參數(shù)資料
型號(hào)： MAX1340BETX+T
廠商： Maxim Integrated Products
文件頁數(shù)： 14/39頁
文件大小： 0K
描述： IC ADC/DAC 12BIT W/FIFO 36WQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： ADC，DAC
分辨率（位）： 12 b
采樣率（每秒）： 225k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
電壓電源： 模擬和數(shù)字
電源電壓： 4.75 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 36-TQFN 裸露焊盤（6x6）
包裝： 帶卷 (TR)
MAX1340/MAX1342/MAX1346/MAX1348
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
______________________________________________________________________________________
21
Table 5. Setup Register*
BIT NAME
BIT
FUNCTION
—
7 (MSB)
Set to zero to select setup register.
—
6
Set to one to select setup register.
CKSEL1
5
Clock mode and
CNVST configuration; resets to one at power-up.
CKSEL0
4
Clock mode and
CNVST configuration.
REFSEL1
3
Reference-mode configuration.
REFSEL0
2
Reference-mode configuration.
DIFFSEL1
1
Unipolar-/bipolar-mode register configuration for differential mode.
DIFFSEL0
0 (LSB)
Unipolar-/bipolar-mode register configuration for differential mode.
Table 5a. Clock Modes (see the
Clock Modes section)
CKSEL1
CKSEL0
CONVERSION CLOCK
ACQUISITION/SAMPLING
CNVST CONFIGURATION
0
Internal
Internally timed.
CNVST
0
1
Internal
Externally timed by
CNVST.
CNVST
1
0
Internal
Internally timed.
AIN7
1
External (3.6MHz max)
Externally timed by SCLK.
AIN7
Table 5b. Clock Modes 00, 01, and 10
REFSEL1
REFSEL0
VOLTAGE
REFERENCE
OVERRIDE
CONDITIONS
AUTOSHUTDOWN
REF2
CONFIGURATION
AIN
Internal reference turns off after scan is complete. If
internal reference is turned off, there is a programmed
delay of 218 internal-conversion clock cycles.
00
Internal (DAC
and ADC)
Temperature
Internal reference required. There is a programmed
delay of 244 internal-conversion clock cycles for the
internal reference to settle after wake-up.
AIN6
AIN
Internal reference not used.
01
External single-
ended (REF1
for DAC and
REF2 for ADC)
Temperature
Internal reference required. There is a programmed
delay of 244 internal-conversion clock cycles for the
internal reference to settle after wake-up.
REF2
AIN
Default reference mode. Internal reference turns off
after scan is complete. If internal reference is turned
off, there is a programmed delay of 218 internal-
conversion clock cycles.
10
Internal (ADC)
and external
REF1 (DAC)
Temperature
Internal reference required. There is a programmed
delay of 244 internal-conversion clock cycles for the
internal reference to settle after wake-up.
AIN6
AIN
Internal reference not used.
11
External
differential
(ADC), external
REF1 (DAC)
Temperature
Internal reference required. There is a programmed
delay of 244 internal-conversion clock cycles for the
internal reference to settle after wake-up.
REF2
*
See below for bit details.
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