- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2008 > MAX132EWG+T (Maxim Integrated Products)IC ADC 18BIT SERIAL 24-SOIC PDF資料下載
參數(shù)資料
| 型號： | MAX132EWG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT SERIAL 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 100 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個偽差分，雙極 |
MAX132
±18-Bit ADC with Serial Interface
10
______________________________________________________________________________________
___________________Digital Interface
Serial data at DIN is sent in 8-bit packets and is shifted
into the internal 8-bit shift register with each rising edge
of SCLK. The data is then latched into either command
input register 0 or command input register 1, as deter-
mined by the LSB of the data sent, and is latched on
the rising edge of CHIP SELECT (CS) Data is clocked
out of the selected output register on each falling edge
of SCLK. D7(MSB) must be the first data bit to be shift-
ed in and is the first bit to be shifted out.
Output data is shifted out at the same time command
data is shifted in. Command data must be clocked in
on the previous 8-bit read-write cycle to receive con-
version data in the present cycle.
Since there is no internal power-on reset, initialize the
MAX132 immediately after power-up to insure correct
operation.
Table 2 defines each bit of five registers: the two com-
mand input registers, output register 0, output register
1, and the status output register.
Command Input Register 0
Register-Set Bits
Data bits D1 and D2 of command register 0 (RS1 and
RS0) determine the data to be read on the data bus.
These bits select which register outputs data to the bus.
Table 3 defines the bit values that determine which reg-
ister is read on the next cycle (Figure 9).
Read-Zero Bit
The read-zero bit allows the ADC to calibrate on com-
mand for zero offset. The read-zero bit, when set to 1,
internally shorts the inputs; when a start-conversion
command is given, the zero error is converted. Subtract
the results from the standard external measurement
conversion when the read-zero conversion ends. If the
read-zero bit is set to 0, the converter measures the
voltage between IN Hl and IN LO once a start bit is
given. Take a new zero reading periodically and when-
ever the ambient temperature, the reference voltage, or
the common-mode input voltage are changed.
START,
READ STATUS
CYCLE 1
REGISTER
INSTRUCTION
(DATA IN)
OUTPUT DATA
OUTPUT STATUS
REGISTER
(EOC, POLARITY, B2–B0)
READ HIGHER
BITS
CYCLE 2
REGISTER 1
( B11–B18)
READ LOWER
BITS
CYCLE 3
REGISTER 0
( B3–B10)
START,
READ STATUS
CYCLE 4
Figure 9. Instruction and Data Sequencing
RS1
0
1
RS0
0
1
0
DEFINITIONS
Selects Register 0; output for data bits B3–B10
Selects Register 1; output for data bits B11–B18
Selects Register 2; output status for data bits
B0–B2, polarity, sleep, integrating, EOC, and
collision bit
1
Invalid data
Command Input
Register 0
Command Input
Register 1
REGISTER
“1”
“0”
Start
Convert
Returns to
0 at EOC
Set P3
Output
Output Register 0
RS1 = 0, RS0 = 0
Output Register 1
RS1 = 0, RS0 = 1
“1”
50Hz
60Hz
Set P2
Output
B10
B18
MSB
Collision
B9
B17
EOC
Sleep
Awake
Set P1
Output
B8
B16
Integrating
Input
Table 3. Register Set-Bit Definitions
Table 2. Register Map of Input and Output Data
Read Zero
Read VIN
Set P0
Output
Don’t Care
RS0*
Don’t Care
B7
B15
Sleep
B6
B14
-Polarity
RS1*
Don’t Care
B5
B13
B4
B12
DATA BIT
0
1
B3
B11
Output Status
Register
RS1 = 1, RS0 = 0
“0”
No Collision Converting
Not
Integrating
Awake
+Polarity
B2
B1
B0
LSB
*Note: Refer to Table 3.
D7
D6
D5
D4
D3
D2
D1
D0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX135EPI+ | IC ADC 15BIT PARALLEL 28-DIP |
| MAX1361MEUB+T | IC SYSTEM MON 10BIT 4CH 10-UMAX |
| MAX1364MEUB+T | IC SYSTEM MON 12BIT 4CH 10-UMAX |
| MAX1394ETB+T | IC ADC 8BIT 416KSPS 10-TDFN-EP |
| MAX1395ETB+T | IC ADC 10BIT 357KSPS 10-TDFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX132MRG | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1330 | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX13300EVKIT+ | 功能描述:音頻 IC 開發(fā)工具 MAX13300/01 EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| MAX13301AUM/V+ | 制造商:Maxim Integrated Products 功能描述:4-CHANNEL, AUTOMOTIVE CLASS D AUDIO AMPLIFIER - Rail/Tube |
| MAX13301AUM/V+T | 制造商:Maxim Integrated Products 功能描述:4-CHANNEL, AUTOMOTIVE CLASS D AUDIO AMPLIFIER - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。