參數(shù)資料
型號(hào)： MAX1316ECM+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 5/27頁(yè)
文件大?。?/td> 0K
描述： IC ADC 14BIT 8CH 2MSPS 48LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 14
采樣率（每秒）： 2M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1.82W
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個(gè)單端，單極
MAX1316–MAX1318/MAX1320–MAX1322/MAX1324–MAX1326
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
______________________________________________________________________________________
13
Detailed Description
The MAX1316–MAX1318/MAX1320–MAX1322/MAX1324-
MAX1326 are 14-bit ADCs. They offer two, four, or eight
(independently selectable) input channels, each with its
own T/H circuitry. Simultaneous sampling of all active
channels preserves relative phase information, making
these devices ideal for motor control and power monitor-
ing. These devices are available with 0 to +5V, ±5V, and
±10V input ranges. The 0 to +5V devices feature ±6V
fault-tolerant inputs. The ±5V and ±10V devices feature
±16.5V fault-tolerant inputs. Two channels convert in 2s;
all eight channels convert in 3.8s, with a maximum 8-
channel throughput of 263ksps per channel. Internal or
external reference and internal- or external-clock capabil-
ity offer great flexibility and ease of use. A write-only con-
figuration register can mask out unused channels, and a
shutdown feature reduces power. A 16.6MHz, 14-bit, par-
allel data bus outputs the conversion result. Figure 1
shows the functional diagram of these devices.
Analog Inputs
T/H
To preserve phase information across these multichan-
nel devices, each input channel has a dedicated
T/H amplifier.
Use a low-input source impedance to minimize gain-
error harmonic distortion. The time required for the T/H
to acquire an input signal depends on the input source
impedance. If the input signal’s source impedance is
high, the acquisition time lengthens and more time
must be allowed between conversions. The acquisition
time (t1) is the maximum time the device takes to
acquire the signal. Use the following formula to calcu-
late acquisition time:
t1 = 10 (RS + RIN) x 6pF
where RIN = 2.2k, RS = the input signal’s source
impedance, and t1 is never less than 180ns. A source
impedance of less than 100 does not significantly
affect the ADC’s performance.
Figure 1. Functional Diagram
MAX1316–MAX1318
MAX1320–MAX1322
MAX1324–MAX1326
CONVST
D13
MSV
DGND
AVDD
SHDN
CLK
CH0
INTERFACE
AND
CONTROL
8 x 1
MUX
14-BIT
ADC
CH7
D0
DVDD
AGND
ALLON
REFMS
REF
REF+
COM
REF-
S/H
8 x 14
SRAM
OUTPUT
DRIVERS
5k
CONFIGURATION
REGISTER
D7
D8
2.500V
*
*SWITCH CLOSED ON UNIPOLAR DEVICES, OPEN ON BIPOLAR DEVICES
INTCLK/EXTCLK
WR
CS
RD
EOC
EOLC
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