- 鎮ㄧ従鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗2086 > MAX1301AEUP+ (Maxim Integrated Products)IC ADC 16BIT SRL 115KSPS 20TSSOP PDF璩囨枡涓嬭級
鍙冩暩璩囨枡
| 鍨嬭櫉锛� | MAX1301AEUP+ |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩锛� | 27/31闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ADC 16BIT SRL 115KSPS 20TSSOP |
| 鐢㈠搧鍩硅〒妯″锛� | Obsolescence Mitigation Program |
| 妯欐簴鍖呰锛� | 74 |
| 浣嶆暩锛� | 16 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 115k |
| 鏁告摎鎺ュ彛锛� | MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? |
| 杞夋彌鍣ㄦ暩鐩細 | 1 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 879mW |
| 闆诲闆绘簮锛� | 妯℃摤鍜屾暩瀛� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 20-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 20-TSSOP |
| 鍖呰锛� | 绠′欢 |
| 杓稿叆鏁哥洰鍜岄鍨嬶細 | 4 鍊嬪柈绔�锛屽柈妤碉紱4 鍊嬪柈绔�锛岄洐妤�锛�2 鍊嬪樊鍒嗭紝闆欐サ |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�鐣跺墠绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�
MAX1300/MAX1301
8- and 4-Channel, 卤3 x VREF Multirange Inputs,
Serial 16-Bit ADCs
_______________________________________________________________________________________
5
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Preamplifier Supply Voltage
AVDD2
4.75
5.25
V
Digital I/O Supply Voltage
DVDDO
2.70
5.25
V
Internal reference
3
3.5
AVDD1 Supply Current
IAVDD1
External clock mode,
external acquisition
mode, or internal
clock mode
External reference
2.3
3
mA
DVDD Supply Current
IDVDD
External clock mode, external acquisition
mode, or internal clock mode
0.8
2
mA
AVDD2 Supply Current
IAVDD2
External clock mode, external acquisition
mode, or internal clock mode
13.5
20
mA
DVDDO Supply Current
IDVDDO
External clock mode, external acquisition
mode, or internal clock mode
0.01
1
mA
Partial power-down mode
1.3
mA
Total Supply Current
Full power-down mode
0.5
A
Power-Supply Rejection Ratio
PSRR
All analog input ranges
卤0.5
LSB
TIMING CHARACTERISTICS (Figures 15 and 16)
External clock mode
0.272
62
External acquisition mode
0.228
62
SCLK Period
tCP
Internal clock mode
0.1
s
External clock mode
109
External acquisition mode
92
SCLK High Pulse Width (Note 6)
tCH
Internal clock mode
40
ns
External clock mode
109
External acquisition mode
92
SCLK Low Pulse Width (Note 6)
tCL
Internal clock mode
40
ns
DIN to SCLK Setup
tDS
40
ns
DIN to SCLK Hold
tDH
0ns
SCLK Fall to DOUT Valid
tDO
40
ns
CS Fall to DOUT Enable
tDV
40
ns
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD1 = VAVDD2 = VDVDD = VDVDDO = 5V, VAGND1 = VDGND = VDGNDO = VAGND2 = VAGND3 = 0V, fCLK = 3.5MHz (50% duty
cycle), external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input
range (卤3 x VREF), CDOUT = 50pF, CSSTRB = 50pF, TA = -40掳C to +85掳C, unless otherwise noted. Typical values are at TA = +25掳C.)
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| MAX13030EETE+ | IC LEVEL TRANS 6CH 16-TQFN-EP |
| MAX13043EETD+T | IC LEVEL TRANSLATOR 14-TDFN |
| MAX13047EEVB+ | IC XLATOR BIDIRECT LEVEL 10UTQFN |
| MAX13058EEWG+T | IC LEVEL TRANSLATOR 8CH 28-TQFN |
| MAX13101EETL+T | IC TRANSLATOR LL 16CH 40TQFN |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
|---|---|
| MAX1301AEUP+ | 鍔熻兘鎻忚堪:妯℃暩杞夋彌鍣� - ADC 16-Bit 4Ch 12V Serial ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:2 绲愭:Sigma-Delta 杞夋彌閫熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
| MAX1301AEUP+T | 鍔熻兘鎻忚堪:妯℃暩杞夋彌鍣� - ADC 16-Bit 4Ch 12V Serial ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:2 绲愭:Sigma-Delta 杞夋彌閫熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
| MAX1301AEUP-T | 鍔熻兘鎻忚堪:妯℃暩杞夋彌鍣� - ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:2 绲愭:Sigma-Delta 杞夋彌閫熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
| MAX1301BEUP | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:4-CHANNEL 12V MULTIRANGE INPUTS - Rail/Tube |
| MAX1301BEUP+ | 鍔熻兘鎻忚堪:妯℃暩杞夋彌鍣� - ADC 16-Bit 4Ch 115ksps 4.136V Precision ADC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:2 绲愭:Sigma-Delta 杞夋彌閫熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-32 |
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京銆�
