參數(shù)資料
型號: MAX13003EEUE+T
廠商: Maxim Integrated Products
文件頁數(shù): 6/25頁
文件大?。?/td> 0K
描述: IC LEVEL TRANS 6CH 16-TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
邏輯功能: 變換器,雙向
位數(shù): 6
輸入類型: CMOS
輸出類型: CMOS
數(shù)據(jù)速率: 20Mbps
通道數(shù): 1
輸出/通道數(shù)目: 6
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 15ns
電源電壓: 1.5 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 帶卷 (TR)
MAX13000E–MAX13005E
Detailed Description
The MAX13000E–MAX13005E logic-level translators
provide the level shifting necessary to allow data trans-
fer in multivoltage systems. Externally applied voltages,
VCC and VL, set the logic levels on each side of the
device. Logic signals present on the VL side of the
device appear as higher voltage logic signals on the
VCC side of the device, and vice-versa.
The MAX13000E/MAX13003E are bidirectional level
translators allowing data translation in either direction
(VL
VCC) on any single data line without the use of a
DIRECTION input. The MAX13001E/MAX13002E/
MAX13004E/MAX13005E unidirectional level translators
level shift data in one direction (VL
→ VCC or VCC
VL) on any single data line. The MAX13001E/
MAX13002E/MAX13004E/MAX13005E unidirectional
translators’ inputs have the capability to interface with
both CMOS and open-drain (OD) outputs. For more
information, see the Ordering Information section and
the Input Driver Requirements section.
The MAX13000E–MAX13005E accept VL from +0.9V to
+3.6V. All devices have VCC ranging from +1.5V to
+3.6V, making them ideal for data transfer between
low-voltage ASICs/PLDs and higher voltage systems.
The MAX13000E–MAX13005E feature low VCC quies-
cent supply current of less than 4A, and VL quiescent
supply current of less than 2A when in shutdown. The
MAX13000E–MAX13005E have ±15kV ESD protection
on the VCC side for greater protection in applications
that route signals externally. The ESD protection is
specified using the Human Body Model (HBM).The
MAX13000E/MAX13001E/MAX13002E operate at a
guaranteed 230kbps data rate. The MAX13003E/
MAX13004E/MAX13005E operate at a guaranteed
20Mbps data rate when VCC > +1.65V.
Level Translation
For normal operation, ensure that +1.5V
≤ VCC ≤ +3.6V,
and +0.9V
≤ VL ≤ VCC. During power-up sequencing,
VL
≥ VCC does not damage the device whenever VL is
within the absolute maximum ratings (see the Absolute
Maximum Ratings section). During power-supply
sequencing, when VCC is floating and VL is powered
up, 1mA of current can be sourced to each load on the
VL side, yet the device does not latch up.
The MAX13000E–MAX13005E are designed to have
VCC
≥ VL at all times; however, if VCC is turned off, the
part will not be damaged and will not latch up. To pre-
vent excessive leakage currents in either the I/O or
supply lines, the I/O on the VL side must be left in the
high state.
The maximum data rate for the MAX13000E–
MAX13005E depends heavily on the load capacitance
(see the Typical Operating Characteristics), output
impedance of the driver, and the operational voltage
range (see the Timing Characteristics table).
Open-Drain Operation
The MAX13001E/MAX13002E/MAX13004E/MAX13005E
have input stages specifically designed to accommo-
date external open-drain drivers. When using open-
drain
drivers,
the
MAX13001E/MAX13002E/
MAX13004E/MAX13005E operate in a unidirectional-
only mode, translating from the OD side to the CMOS
side. For improved performance, the rise- and fall-time
accelerators are present on both the CMOS and the
OD side. See the Input-Driver Requirement section. Do
not use pullup resistors greater than 15k
Ω for proper
operation, and smaller pullup resistance may be need-
ed for higher speed operation.
Input-Driver Requirements
The MAX13000E–MAX13005E feature four different
architectures based on the speed of the part, as well as
on whether the translator is a CMOS-to-CMOS transla-
tor, or whether it is an OD-to-CMOS translator.
20Mbps CMOS-to-CMOS Bidirectional Translator
(MAX13003E)
The MAX13003E architecture is based on a one-shot
accelerator output stage (Figure 5). Accelerator output
stages are always in tri-state, except when there is a
transition on any of the translators on the input side,
either I/OVL or I/OVCC. A short pulse is generated dur-
ing which the one-shot output stage becomes active
and charges/discharges the capacitances at the I/Os.
Due to its bidirectional nature, the accelerator stages on
both the I/OVCC and the I/OVL become active during an
I/O transition from low to high or high to low. This can
lead to some current feeding into the external source
that is driving the translator. However, this behavior
helps speed up the transition on the driven side.
The type of devices that drive the inputs of the
MAX13003E is usually specified with an output drive-
current capability (IOUT). When driving the inputs of the
MAX13003E, the maximum achievable speed is con-
strained by the drive current of the external driver. To
insure the maximum possible throughput of 20Mbps, the
external driver should meet the following requirement:
IOUT
≥ 1.67 × 108 × V × (CIN + CP)
Ultra-Low-Voltage Level Translators
14
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MAX13004EEBE-T 功能描述:轉(zhuǎn)換 - 電壓電平 RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8
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