參數(shù)資料
型號: MAX1281BEUP+T
廠商: Maxim Integrated Products
文件頁數(shù): 20/24頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 300KSPS 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 12
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 559mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極;8 個單端,雙極;4 個偽差分,單極;4 個偽差分,雙極
MAX1280/MAX1281
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
Serial 12-Bit ADCs with Internal Reference
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS—MAX1281 (continued)
(VDD1 = VDD2 = +2.7V to +3.6V, COM = GND, fSCLK = 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle (300ksps), external
+2.5V at REF, REFADJ = VDD1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
Normal operating mode
CONDITIONS
MHz
0.5
4.8
fSCLK
Serial Clock Frequency
ps
< 50
Aperture Jitter
ns
10
Aperture Delay
ns
625
tACQ
Track/Hold Acquisition Time
s
3.3
tCONV
Conversion Time (Note 5)
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
To power down the internal reference
For small adjustments, from 1.22V
0 to 0.75mA output load
On/off leakage current, VCH_ = 0 or VDD1
TA = +25°C
Bipolar, VCOM or VCH_ = VREF/2,
referenced to COM or CH_
Unipolar, VCOM = 0
V/V
2.05
Buffer Voltage Gain
V
1.33
VDD1 - 1
REFADJ Buffer Disable
Threshold
mV
±50
REFADJ Input Range
V
1.22
REFADJ Output Voltage
F
0.01
10
Capacitive Bypass at REFADJ
F
4.7
10
Capacitive Bypass at REF
mV/mA
0.1
2.0
Load Regulation (Note 7)
ppm/°C
±15
TC VREF
REF Output Temperature
Coefficient
mA
15
REF Short-Circuit Current
V
2.480
2.500
2.520
VREF
REF Output Voltage
pF
18
Input Capacitance
A
±0.001
±1
Multiplexer Leakage Current
±VREF/2
%
40
60
Duty Cycle
V
VREF
VCH_
Input Voltage Range, Single-
Ended and Differential (Note 6)
VIN = 0 or VDD2
In power-down, fSCLK = 0
VREF = 2.500V, fSCLK = 0
VREF = 2.500V, fSCLK = 4.8MHz
(Note 8)
pF
15
CIN
Input Capacitance
A
±1
IIN
Input Leakage
V
0.2
VHYST
Input Hysteresis
V
0.8
VINL
Input Low Voltage
V
2.0
VINH
Input High Voltage
5
REF Input Current
320
A
200
350
V
1.0
VDD1 +
50mV
REF Input Voltage Range
CONVERSION RATE
ANALOG INPUTS (CH7–CH0, COM)
INTERNAL REFERENCE
EXTERNAL REFERENCE (Reference buffer disabled, reference applied to REF)
DIGITAL INPUTS (DIN, SCLK, CS, SHDN)
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