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參數(shù)資料
| 型號(hào)： | MAX1183 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Dual 10-Bit, 40Msps, +3V, Low-Power ADC with Internal Reference and Parallel Outputs |
| 中文描述： | 雙路、10位、40Msps、3V、低功耗ADC，內(nèi)置電壓基準(zhǔn)及并行輸出 |
| 文件頁(yè)數(shù)： | 12/18頁(yè) |
| 文件大?。?/td> | 495K |
| 代理商： | MAX1183 |
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M
SNR
dB
= 20
log
10
(1 / [2
π
f
IN
t
AJ
])
where f
IN
represents the analog input frequency and
t
AJ
is the time of the aperture jitter.
Clock jitter is especially critical for undersampling
applications. The clock input should always be consid-
ered as an analog input and routed away from any ana-
log input or other digital signal lines.
The MAX1183 clock input operates with a voltage thresh-
old set to V
DD
/2. Clock inputs with a duty cycle other
than 50% must meet the specifications for high and low
periods as stated in the
Electrical Characteristics
.
System Timing Requirements
Figure 3 depicts the relationship between the clock
input, analog input, and data output. The MAX1183
samples at the rising edge of the input clock. Output
data for channels A and B is valid on the next rising
edge of the input clock. The output data has an internal
latency of five clock cycles. Figure 4 also determines
the relationship between the input clock parameters
and the valid output data on channels A and B.
Digital Output Data, Output Data Format
Selection (T/B), Output Enable (
OE
)
All digital outputs, D0A
–
D9A (Channel A) and
D0B
–
D9B (Channel B) are TTL/CMOS-logic compati-
ble. There is a five-clock-cycle latency between any
particular sample and its corresponding output data.
The output coding can be chosen to be either straight
offset binary or two
’
s complement (Table 1) controlled
by a single pin (T/B). Pull T/B low to select offset binary
and high to activate two
’
s complement output coding.
The capacitive load on the digital outputs D0A
–
D9A
and D0B
–
D9B should be kept as low as possible
(<15pF) to avoid large digital currents that could feed
back into the analog portion of the MAX1183, thereby
degrading its dynamic performance. Using buffers on
the digital outputs of the ADCs can further isolate the
digital outputs from heavy capacitive loads. To further
improve the dynamic performance of the MAX1183
small series resistors (e.g., 100
) may be added to the
digital output paths, close to the MAX1183.
Dual 10-Bit, 40Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
12
______________________________________________________________________________________
N - 6
N
N - 5
N + 1
N - 4
N + 2
N - 3
N + 3
N - 2
N + 4
N - 1
N + 5
N
N + 6
N + 1
5-CLOCK-CYCLE LATENCY
ANALOG INPUT
CLOCK INPUT
DATA OUTPUT
D9A
–
D0A
t
DO
t
CH
t
CL
N - 6
N - 5
N - 4
N - 3
N - 2
N - 1
N
N + 1
DATA OUTPUT
D9B
–
D0B
Figure 3. System Timing Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11835DEMOKIT+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 Demonstration Kit for MAX11835 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11835EWA+ | 制造商:Maxim Integrated Products 功能描述: |
| MAX11835EWA+T | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 TacTouch Haptic Actuator Controller RoHS:否 制造商:Microchip Technology 類型:Resistive Touch Controllers 輸入類型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| MAX11835TEVS+ | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Evaluation System for MAX11835 RoHS:否 制造商:Microchip Technology 類型:Resistive Touch Controllers 輸入類型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
| MAX11836EWA+T | 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:DUAL 10-BIT 40MSPS 3V LOW-POWER ADC WITH INTERNAL REFER - Tape and Reel |
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