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參數(shù)資料
| 型號： | MAX1182ECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 65MSPS DL 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 240mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，雙極；2 個差分，雙極 |
MAX1182
Dual 10-Bit, 65Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs
______________________________________________________________________________________
15
Table 1. MAX1182 Output Codes For Differential Inputs
*VREF = VREFP - VREFN
DIFFERENTIAL INPUT
VOLTAGE*
DIFFERENTIAL
INPUT
STRAIGHT OFFSET
BINARY
T/B = 0
TWO’S COMPLEMENT
T/B = 1
VREF x 511/512
+FULL SCALE - 1 LSB
11 1111 1111
01 1111 1111
VREF x 1/512
+1 LSB
10 0000 0001
00 0000 0001
0
Bipolar Zero
10 0000 0000
00 0000 0000
-VREF x 1/512
-1 LSB
01 1111 1111
11 1111 1111
-VREF x 511/512
-FULL SCALE + 1 LSB
00 0000 0001
10 0000 0001
-VREF x 512/512
-FULL SCALE
00 0000 0000
10 0000 0000
Single-Ended AC-Coupled Input Signal
Figure 7 shows an AC-coupled, single-ended applica-
tion. Amplifiers like the MAX4108 provide high-speed,
high-bandwidth, low noise, and low distortion to main-
tain the integrity of the input signal.
Typical QAM Demodulation Application
The most frequently used modulation technique for digi-
tal communications applications is probably the
Quadrature Amplitude Modulation (QAM). Typically
found in spread-spectrum based systems, a QAM signal
represents a carrier frequency modulated in both ampli-
tude and phase. At the transmitter, modulating the base-
band signal with quadrature outputs, a local oscillator
followed by subsequent up-conversion can generate the
QAM signal. The result is an in-phase (I) and a quadra-
ture (Q) carrier component, where the Q component is
90 degree phase-shifted with respect to the in-phase
component. At the receiver, the QAM signal is divided
down into it’s I and Q components, essentially repre-
senting the modulation process reversed. Figure 8 dis-
plays the demodulation process performed in the
analog domain, using the dual matched 3V, 10-bit ADC
MAX1182 and the MAX2451 quadrature demodulator to
recover and digitize the I and Q baseband signals.
Before being digitized by the MAX1182, the mixed-down
signal components may be filtered by matched analog
filters, such as Nyquist or pulse-shaping filters which
remove any unwanted images from the mixing process,
thereby enhancing the overall signal-to-noise (SNR) per-
formance and minimizing inter-symbol interference.
Grounding, Bypassing, and
Board Layout
The MAX1182 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass VDD, REFP, REFN, and COM with
two parallel 0.1F ceramic capacitors and a 2.2F
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OVDD) to OGND. Multilayer
boards with separated ground and power planes pro-
duce the highest level of signal integrity. Consider the
use of a split ground plane arranged to match the
physical location of the analog ground (GND) and the
digital output driver ground (OGND) on the ADCs pack-
age. The two ground planes should be joined at a sin-
gle point such that the noisy digital ground currents do
not interfere with the analog ground plane. The ideal
location of this connection can be determined experi-
mentally at a point along the gap between the two
ground planes, which produces optimum results. Make
this connection with a low-value, surface-mount resistor
(1
Ω to 5Ω), a ferrite bead or a direct short. Alternatively,
all ground pins could share the same ground plane, if
the ground plane is sufficiently isolated from any noisy,
digital systems ground plane (e.g., downstream output
buffer or DSP ground plane). Route high-speed digital
signal traces away from the sensitive analog traces of
either channel. Make sure to isolate the analog input
lines to each respective converter to minimize channel-
to-channel crosstalk. Keep all signal lines short and
free of 90 degree turns.
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