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參數(shù)資料
| 型號(hào)： | MAX1182ECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 21/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 65MSPS DL 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 240mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
MAX1182
Dual 10-Bit, 65Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs
_______________________________________________________________________________________
9
2.00
2.02
2.01
2.04
2.03
2.05
2.06
-40
10
-15
35
60
85
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
MAX1182
toc27
TEMPERATURE (
°C)
V
REFOUT
(V)
0
20000
40000
60000
80000
100000
120000
140000
160000
N-2
N-1
N
N+1
N+2
OUTPUT NOISE HISTOGRAM (DC INPUT)
MAX1182
toc28
DIGITAL OUTPUT CODE
COUNTS
0
926
129421
725
0
Typical Operating Characteristics (continued)
(VDD = 3V, OVDD = 2.5V, internal reference, differential input at -0.5dBFS, fCLK = 65MHz, CL
≈ 10pF, TA = +25°C, unless otherwise
noted.)
Pin Description
PIN
NAME
FUNCTION
1
COM
Common-Mode Voltage Input/Output. Bypass to GND with a
≥ 0.1F capacitor.
2, 6, 11, 14, 15
VDD
Analog Supply Voltage. Bypass each supply pin to GND with a 0.1F capacitor. Analog
supply accepts a 2.7V to 3.6V input range.
3, 7, 10, 13, 16
GND
Analog Ground
4
INA+
Channel A Positive Analog Input. For single-ended operation, connect signal source to INA+.
5
INA-
Channel A Negative Analog Input. For single-ended operation, connect INA- to COM.
8
INB-
Channel B Negative Analog Input. For single-ended operation, connect INB- to COM.
9
INB+
Channel B Positive Analog Input. For single-ended operation, connect signal source to INB+.
12
CLK
Converter Clock Input
17
T/B
T/B selects the ADC digital output format.
High: Two’s complement.
Low: Straight offset binary.
18
SLEEP
Sleep Mode Input.
High: Deactivates the two ADCs, but leaves the reference bias circuit active.
Low: Normal operation.
19
PD
Power-Down Input.
High: Power-down mode
Low: Normal operation
20
OE
Output Enable Input.
High: Digital outputs disabled
Low: Digital outputs enabled
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