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參數(shù)資料
| 型號： | MAX1111MJE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | +2.7V, Low-Power, Multichannel, Serial 8-Bit ADCs |
| 中文描述： | 4-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 284K |
| 代理商： | MAX1111MJE |
M
+2.7V, Low-Power, Multic hannel,
S erial 8-Bit ADCs
10
______________________________________________________________________________________
Table 3. Control-Byte Format
START
SEL2
SEL1
SEL0
UNI/
BIP
SGL/
DIF
PD1
PD0
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
NAME
SGL/
DIF
2
BIT
1
= single ended,
0
= differential. Selects single-ended or differential conversions. In single-
ended mode, input signal voltages are referred to COM. In differential mode, the voltage differ-
ence between two channels is measured. See Tables 1 and 2.
DESCRIPTION
UNI/
BIP
3
START
1
= unipolar,
0
= bipolar. Selects unipolar or bipolar conversion mode. Select differential operation
if bipolar mode is used. See Table 4.
PD0
0 (LSB)
7 (MSB)
1
= external clock mode,
0
= internal clock mode.
Selects external or internal clock mode.
The first logic “
1
” bit after
CS
goes low defines the beginning of the control byte.
SEL2
SEL1
SEL0
6
5
4
Select which of the input channels are to be used for the conversion (Tables 1 and 2).
PD1
1
1
= fully operational,
0
= power-down.
Selects fully operational or power-down mode.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t
ACQ
, is the minimum time needed for the signal to be
acquired. It is calculated by:
t
ACQ
= 6 x (R
S
+ R
IN
) x 18pF
where R
IN
= 6.5k
, R
S
= the source impedance of the
input signal, and t
ACQ
is never less than 1μs. Note that
source impedances below 2.4k
do not significantly
affect the AC performance of the ADC.
Input Bandwidth
The ADC’s input tracking circuitry has a 1.5MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high-
frequency signals being aliased into the frequency
band of interest, anti-alias filtering is recommended.
Analog Inputs
Internal protection diodes, which clamp the analog
input to V
DD
and AGND, allow the channel input pins to
swing from (AGND - 0.3V) to (V
DD
+ 0.3V) without dam-
age. However, for accurate conversions near full scale,
the inputs must not exceed V
DD
by more than 50mV or
be lower than AGND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, do not forward bias the protection diodes of
off channels over 2mA.
The MAX1110/MAX1111 can be configured for differen-
tial or single-ended inputs with bits 2 and 3 of the con-
trol byte (Table 3). In single-ended mode, the analog
inputs are internally referenced to COM with a full-scale
input range from COM to V
REFIN
+ COM. For bipolar
operation, set COM to V
REFIN
/ 2.
In differential mode, choosing unipolar mode sets the
differential input range at 0V to V
REFIN
. In unipolar
mode, the output code is invalid (code zero) when a
negative differential input voltage is applied. Bipolar
mode sets the differential input range to ±V
REFIN
/ 2.
Note that in this mode, the common-mode input range
includes both supply rails. Refer to Table 4 for input
voltage ranges.
Quic k Look
To quickly evaluate the MAX1110/MAX1111’s analog
performance, use the circuit of Figure 5. The
MAX1110/MAX1111 require a control byte to be written
to DIN before each conversion. Tying DIN to +3V feeds
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