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參數(shù)資料
| 型號(hào)： | MAX1088EKA-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | ADC |
| 英文描述： | 150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 |
| 中文描述： | 2-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | SOT-23, 8 PIN |
| 文件頁(yè)數(shù)： | 11/15頁(yè) |
| 文件大小： | 334K |
| 代理商： | MAX1088EKA-T |
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and is available in MSB-first format. Observe the
SCLK to DOUT valid timing characteristic. Clock
data into the μP on SCLK
’
s rising-edge.
SPI and MICROWIRE Interface
When using SPI interface (Figure 8a) or MICROWIRE
(Figure 8a and 8b), set CPOL = CPHA = 0. Two 8-bit
readings are necessary to obtain the entire 10-bit result
from the ADC. DOUT data transitions on the serial
clock
’
s falling edge and is clocked into the μP on
SCLK
’
s rising edge. The first 8-bit data stream contains
the first 8-bits of DOUT starting with the MSB. The sec-
ond 8-bit data stream contains the remaining two result
bits (B1, B0) and two trailing sub-bits (S1, S0). DOUT
then goes high impedance.
QSPI Interface
Using the high-speed QSPI interface (Figure 9a) with
CPOL = 0 and CPHA = 0, the MAX1086
–
MAX1089
support a maximum f
SCLK
of 8MHz. One 8- to16-bit
reading is necessary to obtain the entire 10-bit result
from the ADC. DOUT data transitions on the serial
clock
’
s falling edge and is clocked into the μP on
SCLK
’
s rising edge. The first 10 bits are the data and
the next two bits are sub-bits (S1, S0). DOUT then
goes high impedance (Figure 9b).
PIC16 and SSP Module and
PIC17 Interface
The MAX1086
–
MAX1089 are compatible with a
PIC16/PIC17 microcontroller (μC), using the synchro-
nous serial port (SSP) module
To establish SPI communication, connect the controller
as shown in Figure 10a and configure the PIC16/PIC17
as system master. This is done by initializing its syn-
chronous serial port control register (SSPCON) and
synchronous serial port status register (SSPSTAT) to
the bit patterns shown in Tables 1 and 2.
In SPI mode, the PIC16/PIC17 μCs allow eight bits of
data to be synchronously transmitted and received
simultaneously. Two consecutive 8-bit readings (Figure
10b) are necessary to obtain the entire 10-bit result
from the ADC. DOUT data transitions on the serial
clock
’
s falling edge and is clocked into the μC on
SCLK
’
s rising edge. The first 8-bit data stream contains
M
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23
______________________________________________________________________________________
11
Figure 8a. SPI Connections
Table 1. Detailed SSPCON Register Content
Figure 8b. MICROWIRE Connections
CNVST
SCLK
DOUT
I/O
SCK
MISO
V
DD
SS
SPI
MAX1086–
MAX1089
MAX1086
–
MAX1089
CNVST
SCLK
DOUT
I/O
SK
SI
MICROWIRE
CONTROL BIT
MAX1086
–
MAX1089
SETTINGS
SYNCHRONOUS SERIAL PORT CONTROL REGISTER (SSPCON)
WCOL
SSPOV
Bit 7
Bit 6
X
X
Write Collision Detection Bit
Receive Overflow Detect Bit
SSPEN
Bit 5
1
Synchronous Serial Port Enable Bit.
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO and SCI pins as serial port pins.
CKP
SSPM3
SSPM2
SSPM1
SSPM0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
1
Clock Polarity Select Bit. CKP = 0 for SPI master mode selection.
Synchronous Serial Port Mode Select Bit. Sets SPI master mode and selects
f
CLK
= f
OSC
/ 16.
X = Don
’
t care
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