參數(shù)資料
型號(hào): MAX1067CEEE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Multichannel, 14-Bit, 200ksps Analog-to-Digital Converters
中文描述: 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
封裝: 0.150 INCH, 0.250 INCH PITCH, MO-137AB, QSOP-16
文件頁數(shù): 20/30頁
文件大小: 447K
代理商: MAX1067CEEE
M
Internal Clock 16-Bit-Wide Data-Transfer and
Scan Mode (MAX1068 Only)
Force DSPR high and DSEL low for the SPI/QSPI/
MICROWIRE-interface mode. The falling edge of
CS
wakes the analog circuitry and allows SCLK to clock in
data (see Figure 13). DOUT changes from high-Z to logic
low after
CS
is brought low. Input data latches on the ris-
ing edge of SCLK. The command/configuration/control
register begins reading DIN on the first SCLK rising
edge and ends on the rising edge of the 8th SCLK
cycle. The MAX1068 selects the proper channel for
conversion on the rising edge of the 3rd SCLK cycle.
The internal oscillator activates 125ns after the rising
edge of the 16th SCLK cycle. Turn off the external
clock while the internal clock is on. Turning off SCLK
ensures lowest noise performance during acquisition.
Acquisition begins on the 2nd rising edge of the inter-
nal clock and ends on the falling edge of the 18th inter-
nal clock cycle. Each bit of the conversion result shifts
into memory as it becomes available. The conversion
result is available (MSB first) at DOUT on the falling
edge of
EOC
. The internal oscillator and analog circuit-
ry are shut down on the
EOC
high-to-low transition. Use
the
EOC
high-to-low transition as the signal to restart
the external clock (SCLK). To read the entire conver-
sion result, 16 SCLK cycles are needed. Extra clock
pulses, occurring after the conversion result has been
clocked out and prior to the rising edge of
CS,
cause
the conversion result to be shifted out again. The
MAX1068 internal-clock 16-bit-wide data-transfer mode
requires 32 external clock cycles and 32 internal clock
cycles for completion.
Force
CS
high after the conversion result is read. For
maximum throughput, force
CS
low again to initiate the
next conversion immediately after the specified mini-
mum time (t
CSW
). Forcing
CS
high in the middle of a
conversion immediately aborts the conversion and
places the MAX1068 in shutdown.
Scan mode allows multiple channels to be scanned
consecutively or one channel to be scanned eight
times. Scan mode can only be enabled when using the
MAX1068 in internal clock mode. Enable scanning by
setting bits 4 and 3 in the command/configuration/con-
trol register (see Tables 3 and 4). In scan mode, conver-
sion results are stored in memory until the completion of
the last conversion in the sequence. Upon completion of
the last conversion in the sequence,
EOC
transitions
from high to low to indicate the end of the conversion
and shuts down the internal oscillator. Use the
EOC
high-to-low transition as the signal to restart the external
clock (SCLK). DOUT provides the conversion results in
the same order as the channel conversion process. The
MSB of the first conversion is available at DOUT on the
falling edge of
EOC
. Figure 15 shows the timing dia-
gram for 16-bit-wide data transfer in scan mode.
Multichannel, 14-Bit, 200ksps Analog-to-Digital
Converters
20
______________________________________________________________________________________
DOUT
CS
SCLK
DIN
EOC
ADC
STATE
INTERNAL
CLK
1
8
9
16
X = DON,T CARE
2
13
17
45
48
64
32
34
X X X X X X X X
DATA
LSB
S1
S0
X
t
ACQ
POWER-DOWN
t
CONV
t
ACQ
t
CONV
MSB
Figure 15. SPI Internal Clock Mode, 16-Bit Data-Transfer Mode, Scan Mode for Two Conversions, Conversion Timing (MAX1068 Only)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX1067CEEE-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1068 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:MAX1168 Evaluation Kit/Evaluation System
MAX1068ACEG 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1068ACEG+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC MultiCh 14-Bit 200ksps RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1068ACEG+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC MultiCh 14-Bit 200ksps RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32