參數(shù)資料
型號(hào)： MAX100
廠商： Maxim Integrated Products, Inc.
英文描述： 250Msps, 8-Bit ADC with Track/Hold(250Msps,單通道，并行,8位模數(shù)轉(zhuǎn)換器)
中文描述： 250Msps、8位ADC，帶有采樣/保持
文件頁(yè)數(shù)： 4/16頁(yè)
文件大小： 159K
代理商： MAX100
OUTPUT CODE
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
0.75
0.50
0.25
0
-0.25
0
64
128
192
256
-0.50
-0.75
I
OUTPUT CODE
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
0.75
0.50
0.25
0
-0.25
0
D
64
128
192
256
-0.50
-0.75
__________________________________________Typic al Operating Charac teristic s
(T
A
= +25°C, unless otherwise noted.)
M
250Msps, 8-Bit ADC with Trac k/Hold
4
_______________________________________________________________________________________
TIMING CHARACTERISTICS
(V
EE
= -5.2V, V
CC
= +5V, R
L
= 50
to -2V, VA
RT
= 1.02V, VA
RB
= -1.02V, T
A
= +25°C, unless otherwise noted.)
DIV = 0, Figure 1
DIV = 1, Figure 2
DIV = 0, Figure 1
DIV = 1, Figure 2
CLK, CLK, Figures 1 and 2
0.8
1.9
0.5
-1.4
2.4
5.7
2.2
-0.1
CLK, CLK, Figures 1 and 2
ns
t
PD1
CLK to DCLK
Propagation Delay
CONDITIONS
See Figures 3 and 4
and Table 1 (delay
depends on output
mode)
20% to 80%
Clock
Cycles
8 1/2
8 1/2
t
NPD
7 1/2
7 1/2
Pipeline Delay
(Latency)
7 1/2
7 1/2
ps
700
600
t
R
500
Rise Time
ns
1.9
t
PWH
ns
1.9
5.0
t
PWL
Clock Pulse Width Low
Clock Pulse Width High
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
ns
t
PD2
DCLK to A/BData
Propagation Delay
DCLK
DATA
DCLK
DATA
20% to 80%
ps
550
t
F
Fall Time
Divide-by-1 mode
Divide-by-
2 mode
BData
AData
Note 3:
All devices are 100% production tested at +25°C and are guaranteed by design for T
A
= T
MIN
to T
MAX
as specified.
Note 4:
Deviation from best-fit straight line. See Integral Nonlinearity section.
Note 5:
See the Signal-to-Noise Ratio and Effective Bits section in the Definitions of Specifications.
Note 6:
SNR calculated from effective bits performance using the following equation: SNR (dB) = 1.76 + (6.02) (effective bits).
Note 7:
Clock pulse width minimum requirements t
PWL
and t
PWH
must be observed to achieve stated performance.
Note 8:
Functionality guaranteed for -1.07
≤
V
IH
≤
-0.7 and -2.0
≤
V
IL
≤
-1.5.
Note 9:
Outputs terminated through 50
to -2.0V.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX-100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HIGH CURRENT TRANSIENT VOLTAGE SUPPRESSOR
MAX1002 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Low-Power, 60Msps, Dual, 6-Bit ADC
MAX1002CAX 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1002CAX+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 60Msps Dual 6-Bit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1002CAX+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 60Msps Dual 6-Bit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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