參數(shù)資料
型號: MAC7136VVM50
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PBGA208
封裝: 17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, MAPBGA-208
文件頁數(shù): 19/56頁
文件大?。?/td> 1216K
代理商: MAC7136VVM50
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
26
3.10.2 ATD Accuracy
Table 29 and Table 30 specify the ATD conversion performance excluding any errors due to current
injection, input capacitance and source resistance.
For the following definitions, see Figure 9.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps:
Eqn. 17
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
Eqn. 18
Table 29. ATD Conversion Performance in 5.0 V Range
Conditions shown in Table 7 except as noted here:
fATDCLK = 2.0 MHz, 4.5 V ≤ VDDA ≤ 5.5 V
Num C
Rating
Symbol
Min
Typ
Max
Unit
R1
P 10-bit Resolution
LSB
5 1
NOTES:
1. Assumes VREF = VRH – VRL = 5.12 V, other VREF conditions result in different LSB resolutions.
—mV
R2
P 10-bit Differential Nonlinearity
DNL
–1
1
Counts
R3
P 10-bit Integral Nonlinearity
INL
–2.5
±1.5
2.5
Counts
R4
P 10-bit Absolute Error 2
2. These values include the quantization error which is inherently count for any A/D converter.
AE
–3
±2.0
3
Counts
R5
P 8-bit Resolution
LSB
—mV
R6
P 8-bit Differential Nonlinearity
DNL
–0.5
0.5
Counts
R7
P 8-bit Integral Nonlinearity
INL
–1.0
±0.5
1.0
Counts
R8
P 8-bit Absolute Error 2
AE
–1.5
±1.0
1.5
Counts
Table 30. ATD Conversion Performance in 3.3 V Range
Conditions shown in Table 7 except as noted here:
fATDCLK = 2.0 MHz, 3.15 V ≤ VDDA ≤ 3.6 V
Num C
Rating
Symbol
Min
Typ
Max
Unit
S1
P 10-bit Resolution
LSB
3.25 1
NOTES:
1. Assumes VREF = VRH – VRL = 3.33 V, other VREF conditions result in different LSB resolutions.
—mV
S2
P 10-bit Differential Nonlinearity
DNL
–1.5
1.5
Counts
S3
P 10-bit Integral Nonlinearity
INL
–3.5
±1.5
3.5
Counts
S4
P 10-bit Absolute Error 2
2. These values include the quantization error which is inherently count for any A/D converter.
AE
–5
±2.0
5
Counts
S5
P 8-bit Resolution
LSB
—mV
S6
P 8-bit Differential Nonlinearity
DNL
–0.5
0.5
Counts
S7
P 8-bit Integral Nonlinearity
INL
–1.5
±1.0
1.5
Counts
S8
P 8-bit Absolute Error 2
AE
–1.5
±1.0
1.5
Counts
DNL i
()
V
i
V
i1
1 LSB
----------------------
1
=
INL n
()
DNL i
()
i1
=
n
V
n
V
0
1 LSB
-------------------
n
==
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