
2011-2012 Microchip Technology Inc.
Preliminary
DS70657E-page 149
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
REGISTER 8-14:
DMAPPS: DMA PING-PONG STATUS REGISTER
U-0
—
bit 15
bit 8
U-0
R-0
—
PPST3
PPST2
PPST1
PPST0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-4
Unimplemented: Read as ‘0’
bit 3
PPST3: Channel 3 Ping-Pong Mode Status Flag bit
1 = DMASTB3 register selected
0 = DMASTA3 register selected
bit 2
PPST2: Channel 2 Ping-Pong Mode Status Flag bit
1 = DMASTB2 register selected
0 = DMASTA2 register selected
bit 1
PPST1: Channel 1 Ping-Pong Mode Status Flag bit
1 = DMASTB1 register selected
0 = DMASTA1 register selected
bit 0
PPST0: Channel 0 Ping-Pong Mode Status Flag bit
1 = DMASTB0 register selected
0 = DMASTA0 register selected