參數(shù)資料
型號(hào): M5M4V64S30ATP-8L
廠商: Mitsubishi Electric Corporation
英文描述: Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85
中文描述: 64M號(hào)(4銀行甲2097152字× 8位)同步DRAM
文件頁(yè)數(shù): 16/51頁(yè)
文件大?。?/td> 1161K
代理商: M5M4V64S30ATP-8L
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
SDRAM (Rev.1.3)
Mar98
Multi Bank Interleaving READ (BL=4, CL=3)
CLK
Command
A0-9
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
READ
Y
0
10
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
ACT
Xb
Xb
10
PRE
0
00
tRCD
/CAS latency
Burst Length
A11
Xa
Xb
READ with Auto-Precharge (BL=4, CL=3)
CLK
Command
A0-9
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
1
00
Qa0
Qa1
Qa2
Qa3
ACT
Xa
Xa
00
Internal precharge start
tRCD
tRP
A11
Xa
Xa
BL
BL + tRP
READ Auto-Precharge Timing (BL=4)
CLK
Command
ACT
READ
Internal Precharge Start Timing
DQ
DQ
CL=3
CL=2
Qa1
Qa2
Qa3
Qa0
BL
Qa1
Qa2
Qa3
Qa0
16
相關(guān)PDF資料
PDF描述
M5M4V64S40ATP-10 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-10L 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8A 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8L 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M4V64S40ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
M5M4V64S40ATP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM