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參數(shù)資料
| 型號(hào)： | M54HC4040K |
| 廠商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 計(jì)數(shù)器 |
| 英文描述： | HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, CDFP16 |
| 封裝： | CERAMIC, DFP-16 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大?。?/td> | 328K |
| 代理商： | M54HC4040K |
1/11
May 2004
s
HIGH SPEED:
fMAX =70MHz (TYP.) at VCC =6V
s
LOW POWER DISSIPATION:
ICC =4A(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH =VNIL = 28% VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|= IOL =4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 4040
s
SPACE GRADE-1: ESA SCC QUALIFIED
s
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s
DEVICE FULLY COMPLIANT WITH
SCC-9204-069
DESCRIPTION
The M54HC4040 is an high speed CMOS 12
STAGE
BINARY
COUNTER
fabricated
with
silicon gate C2MOS technology.
A clear input is used to reset the counter to the all
low
level
state.
A
high
level
on
CLEAR
accomplishes the reset function. A negative
transition on the CLOCK input increments the
counter by one.
For M54HC4040 each division stage has an
output; the final frequency is 1/4096 fIN.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M54HC4040
RAD-HARD 12 STAGE BINARY COUNTER
PIN CONNECTION
ORDER CODES
PACKAGE
FM
EM
DILC
M54HC4040D
M54HC4040D1
FPC
M54HC4040K
M54HC4040K1
DILC-16
FPC-16
Rev. 1
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