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參數(shù)資料
| 型號： | M54HC4060K1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, CDFP16 |
| 封裝： | CERAMIC, DFP-16 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 382K |
| 代理商： | M54HC4060K1 |
1/12
May 2004
s
HIGH SPEED:
fMAX = 65MHz (TYP.) at VCC =6V
s
LOW POWER DISSIPATION:
ICC =4A(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH =VNIL = 28% VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|= IOL =4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 4060
s
SPACE GRADE-1: ESA SCC QUALIFIED
s
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s
DEVICE FULLY COMPLIANT WITH
SCC-9204-076
DESCRIPTION
The M54HC4060 is an high speed CMOS
14-STAGE
BINARY
COUNTER/OSCILLATOR
fabricated with silicon gate C2MOS technology.
The oscillator configuration allows design of either
RC or crystal oscillator circuits. A high level on the
CLEAR accomplishes the reset function, i.e. all
counter outputs are made low and the oscillator is
disabled.
A negative transition on the clock input increments
the counter. Ten kinds of divided output are
provided; 4 to 10 and 12 to 14 stage inclusive. The
maximum division available at Q12 is 1/16384 f
oscillator.
The 1 input and the CLEAR input are equipped
with protection circuits against static discharge
and transient excess voltage.
M54HC4060
RAD-HARD 14 STAGE BINARY COUNTER/OSCILLATOR
PIN CONNECTION
ORDER CODES
PACKAGE
FM
EM
DILC
M54HC4060D
M54HC4060D1
FPC
M54HC4060K
M54HC4060K1
DILC-16
FPC-16
Rev. 1
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