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    參數(shù)資料
    型號: M48T58Y-70PC1TR
    廠商: STMICROELECTRONICS
    元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
    英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP28
    封裝: 0.600 INCH, CAPHAT, PLASTIC, DIP-28
    文件頁數(shù): 5/33頁
    文件大小: 511K
    代理商: M48T58Y-70PC1TR
    M48T58, M48T58Y
    WRITE mode
    Doc ID 2412 Rev 7
    Table 4.
    WRITE mode AC characteristics
    Symbol
    Parameter(1)
    1.
    Valid for ambient operating temperature: TA = 0 to 70 °C; VCC = 4.75 to 5.5 V or 4.5 to 5.5 V (except where
    noted).
    M48T58/Y
    Unit
    Min
    Max
    tAVAV
    WRITE cycle time
    70
    ns
    tAVWL
    Address valid to WRITE enable low
    0
    ns
    tAVE1L
    Address valid to chip enable 1 low
    0
    ns
    tAVE2H
    Address valid to chip enable 2 high
    0
    ns
    tWLWH
    WRITE enable pulse width
    50
    ns
    tE1LE1H
    Chip enable 1 low to chip enable 1 high
    55
    ns
    tE2HE2L
    Chip enable 2 high to chip enable 2 low
    55
    ns
    tWHAX
    WRITE enable high to address transition
    0
    ns
    tE1HAX
    Chip enable 1 high to address transition
    0
    ns
    tE2LAX
    Chip enable 2 low to address transition
    0
    ns
    tDVWH
    Input valid to WRITE enable high
    30
    ns
    tDVE1H
    Input valid to chip enable 1 high
    30
    ns
    tDVE2L
    Input valid to chip enable 2 low
    30
    ns
    tWHDX
    WRITE enable high to input transition
    5
    ns
    tE1HDX
    Chip enable 1 high to input transition
    5
    ns
    tE2LDX
    Chip enable 2 low to input transition
    5
    ns
    tWLQZ
    (2)(3)
    2.
    CL = 5 pF.
    3.
    If E1 goes low or E2 high simultaneously with W going low, the outputs remain in the high impedance
    state.
    Write enable low to output Hi-Z
    25
    ns
    tAVWH
    Address valid to WRITE enable high
    60
    ns
    tAVE1H
    Address valid to chip enable 1 high
    60
    ns
    tAVE2L
    Address valid to chip enable 2 low
    60
    ns
    tWHQX
    WRITE enable high to output transition
    5
    ns
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