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參數(shù)資料
| 型號(hào)： | M470L3324BT0-CA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| 中文描述： | DDR SDRAM的緩沖模塊18 4針緩沖模塊基于512Mb乙芯片 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 284K |
| 代理商： | M470L3324BT0-CA2 |
DDR SDRAM
256MB, 512MB, 1GB Unbuffered SODIMM
Rev. 0.1 June 2005
Preliminary
(V
DD
=2.7V, T = 10
°
C)
* Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap.
Symbol
IDD0
IDD1
IDD2P
IDD2F
IDD2Q
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
CC(DDR400@CL=3) B3(DDR333@CL=2.5) A2(DDR266@CL=2) B0(DDR266@CL=2.5)
480
420
640
560
20
20
120
120
100
100
180
120
240
180
760
680
860
740
880
820
20
20
12
12
1,600
1,520
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes
380
520
20
120
100
120
180
620
640
780
20
12
1,380
380
520
20
120
100
120
180
620
640
780
20
12
1,380
IDD6
Normal
Low power
IDD7A
Optional
(V
DD
=2.7V, T = 10
°
C)
* Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap.
Symbol
IDD0
IDD1
IDD2P
IDD2F
IDD2Q
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
CC(DDR400@CL=3) B3(DDR333@CL=2.5) A2(DDR266@CL=2) B0(DDR266@CL=2.5)
720
600
880
740
40
40
240
240
200
200
360
240
480
360
1,000
860
1,100
920
1,120
1,000
40
40
24
24
1,840
1,700
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes
560
700
40
240
200
240
360
800
820
960
40
24
1,560
560
700
40
240
200
240
360
800
820
960
40
24
1,560
IDD6
Normal
Low power
IDD7A
Optional
9.1 M470L3324DU0 [ (32M x 64) 256MB Module ]
9.2 M470L6524DU0 [ (64M x 64) 512MB Module ]
9.0 DDR SDRAM IDD spec table
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M470L3324BT0-CB0 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CB3 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CCC | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CLA2 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CLB0 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M470L3324BT0-CB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CB3 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CCC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CLA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
| M470L3324BT0-CLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb B-die |
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