參數(shù)資料
型號(hào)： M470L3223DT0-CA2
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 256MB DDR SDRAM MODULE
中文描述： 256MB的DDR內(nèi)存模塊
文件頁(yè)數(shù)： 8/16頁(yè)
文件大?。?/td> 171K
代理商： M470L3223DT0-CA2
M470L3223DT0
Rev. 0.0 Dec. 2001
AC Operating Conditions
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
VREF + 0.31
V
V
V
V
3
3
1
2
VREF - 0.31
VDDQ+0.6
0.5*VDDQ+0.2
0.7
0.5*VDDQ-0.2
Note 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of V
IX
is expected to equal 0.5*V
DDQ
of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in simula-
tion. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
I
DD7A
: Operating current: Four bank operation
1. Four banks are being interleaved with tRC(min), Burst Mode, Address and Control inputs on NOP edge are not
changing. lout = 0mA
2. Timing patterns
- DDR200(100Mhz, CL=2) : tCK = 10ns, CL2, BL=4, tRRD = 2*tCK, tRCD= 3*tCK, Read with autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 A0 R3 A1 R0 - repeat the same timing with random address changing
*100% of data changing at every burst
- DDR266B(133Mhz, CL=2.5) : tCK = 7.5ns, CL=2.5, BL=4, tRRD = 2*tCK, tRCD = 3*tCK
Read with autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 N R3 A0 N A1 R0 - repeat the same timing with random address changing
*100% of data changing at every burst
- DDR266A (133Mhz, CL=2) : tCK = 7.5ns, CL2=2, BL=4, tRRD = 2*tCK, tRCD = 3*tCK,Read with autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 N R3 A0 N A1 R0 - repeat the same timing with random address changing
*100% of data changing at every burst
-DDR333(166Mhz,CL=2.5) : tCK=6ns, CL=2.5, BL=4, tRRD=2*tCK, tRCD=3*tCK,Read with autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 N R3 A0 N A1 R0 - repeat the same timing with random address changing
*100% of data changing at every burst
Legend : A=Activate, R=Read, W=Write, P=Precharge, N=NOP
相關(guān)PDF資料
PDF描述
M470L3223DT0-CB0 256MB DDR SDRAM MODULE
M470L3223DT0-CB3 256MB DDR SDRAM MODULE
M470L3223DT0-CLA0 256MB DDR SDRAM MODULE
M470L3223DT0-CLA2 256MB DDR SDRAM MODULE
M470L3223DT0-CLB0 256MB DDR SDRAM MODULE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M470L3223DT0-CB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256MB DDR SDRAM MODULE
M470L3223DT0-CB3 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256MB DDR SDRAM MODULE
M470L3223DT0-CLA0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256MB DDR SDRAM MODULE
M470L3223DT0-CLA2 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256MB DDR SDRAM MODULE
M470L3223DT0-CLB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256MB DDR SDRAM MODULE
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*