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參數(shù)資料
| 型號(hào)： | M464S3254DTS |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| 中文描述： | 32Mx64 SDRAM內(nèi)存的SODIMM在16Mx16顯示，4Banks，8K的刷新，3.3V的同步DRAM的社民黨 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 166K |
| 代理商： | M464S3254DTS |
M464S3254DTS
Rev. 0.0 Jan. 2002
PC133/PC100 SODIMM
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
REFER TO THE INDIVIDUAL COMPONENET, NOT THE WHOLE MODULE.
Parameter
Symbol
-7C
-7A
-1H
-1L
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
CLK cycle time
CAS latency=3
t
CC
7.5
1000
7.5
1000
10
1000
10
1000
ns
1
CAS latency=2
7.5
10
10
12
CLK to valid
output delay
CAS latency=3
t
SAC
5.4
5.4
6
6
ns
1,2
CAS latency=2
5.4
6
6
7
Output data
hold time
CAS latency=3
t
OH
3
3
3
3
ns
2
CAS latency=2
3
3
3
3
CLK high pulse width
t
CH
2.5
2.5
3
3
ns
3
CLK low pulse width
t
CL
2.5
2.5
3
3
ns
3
Input setup time
t
SS
1.5
1.5
2
2
ns
3
Input hold time
t
SH
0.8
0.8
1
1
ns
3
CLK to output in Low-Z
t
SLZ
1
1
1
1
ns
2
CLK to output
in Hi-Z
CAS latency=3
t
SHZ
5.4
5.4
6
6
ns
CAS latency=2
5.4
6
6
7
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M464S3254ET | SDRAM Unbuffered SODIMM |
| M464S3254ETS-C7A | SDRAM Unbuffered SODIMM |
| M464S3254ETS | SDRAM Unbuffered SODIMM |
| M464S6453EN0-C7A | SDRAM Unbuffered SODIMM |
| M464S6454EN0 | SDRAM Unbuffered SODIMM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M464S3254DTS-L1H/C1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L1L/C1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L7A/C7A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L7C/C7C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254ET | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SDRAM Unbuffered SODIMM |
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