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參數(shù)資料
| 型號(hào)： | M464S3254DTS |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| 中文描述： | 32Mx64 SDRAM內(nèi)存的SODIMM在16Mx16顯示，4Banks，8K的刷新，3.3V的同步DRAM的社民黨 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 166K |
| 代理商： | M464S3254DTS |
M464S3254DTS
Rev. 0.0 Jan. 2002
PC133/PC100 SODIMM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
Unit
Note
-7C
-7A
-1H
-1L
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
560
520
520
520
mA
1
Precharge standby cur-
rent in power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
16
mA
I
CC2
PS
16
Precharge standby cur-
rent in non power-down
mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
160
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
80
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
48
mA
I
CC3
PS
48
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
240
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
200
mA
Operating current
(Burst mode)
I
CC4
I
O
= 0 mA
Page burst
4banks Activated.
t
CCD
= 2CLKs
680
680
640
640
mA
1
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
1000
920
880
880
mA
2
Self refresh current
I
CC6
CKE
≤
0.2V
C
24
mA
L
12
mA
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
).
Notes :
相關(guān)PDF資料 |
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|---|---|
| M464S3254ET | SDRAM Unbuffered SODIMM |
| M464S3254ETS-C7A | SDRAM Unbuffered SODIMM |
| M464S3254ETS | SDRAM Unbuffered SODIMM |
| M464S6453EN0-C7A | SDRAM Unbuffered SODIMM |
| M464S6454EN0 | SDRAM Unbuffered SODIMM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M464S3254DTS-L1H/C1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L1L/C1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L7A/C7A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254DTS-L7C/C7C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD |
| M464S3254ET | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SDRAM Unbuffered SODIMM |
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