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參數(shù)資料
| 型號(hào)： | M464S1724FTS-C(L)7A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 144pin Unbuffered SODIMM based on 128Mb F-die 64-bit Non ECC |
| 中文描述： | 144Pin支持無緩沖的SODIMM 128Mb的基礎(chǔ)上的F -模的64位非ECC |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 221K |
| 代理商： | M464S1724FTS-C(L)7A |
64MB, 128MB Unbuffered SODIMM
SDRAM
Rev. 1.4 May 2004
DC CHARACTERISTICS
M464S0924FTS (8M x 64, 64MB Module)
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
Unit
Note
7A
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
400
mA
1
Precharge standby current
in power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 10ns
8
mA
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
8
Precharge standby current
in non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
80
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
40
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 10ns
20
mA
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
20
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
120
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
100
mA
Operating current
(Burst mode)
I
CC4
I
O
= 0 mA
Page burst
4Banks activated
t
CCD
= 2CLKs
560
mA
1
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
800
mA
2
Self refresh current
I
CC6
CKE
≤
0.2V
C
8
mA
L
3.2
mA
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
)
Notes :
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