
227
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
20.3
Use of ADC Amplifiers
Thanks to AMPCMP0 configuration bit, comparator 0 positive input can be connected to amplifier O output. In that case, the
Thanks to AMPCMP1 configuration bit, comparator 1 positive input can be connected to amplifier 1 output. In that case, the
Thanks to AMPCMP2 configuration bit, comparator 2 positive input can be connected to amplifier 2 output. In that case, the
20.4
Analog Comparator Register Description
Each analog comparator has its own control register.
A dedicated register has been designed to consign the outputs and the flags of the 4 analog comparators.
20.4.1 Analog Comparator 0 Control Register – AC0CON
Bit 7– AC0EN: analog comparator 0 Enable Bit
Set this bit to enable the analog comparator 0.
Clear this bit to disable the analog comparator 0.
Bit 6– AC0IE: analog comparator 0 Interrupt Enable bit
Set this bit to enable the analog comparator 0 interrupt.
Clear this bit to disable the analog comparator 0 interrupt.
Bit 5, 4– AC0IS1, AC0IS0: analog comparator 0 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
Bit 3 – ACCKSEL: Analog Comparator Clock Select
Set this bit to use the 16MHz PLL output as comparator clock. Clear this bit to use the CLKIO as comparator clock.
Bit 2, 1, 0– AC0M2, AC0M1, AC0M0: Analog Comparator 0 Multiplexer Register
These 3 bits determine the input of the negative input of the analog comparator.
Bit
7
654
3
2
1
0
AC0EN
AC0IE
AC0IS1
AC0IS0
ACCKSEL
AC0M2
AC0M1
AC0M0
AC0CON
Read/Write
R/W
Initial Value
0
Table 20-1. Interrupt Sensitivity Selection
AC0IS1
AC0IS0
Description
0
Comparator interrupt on output toggle
0
1
Reserved
1
0
Comparator interrupt on output falling edge
1
Comparator interrupt on output rising edge