參數(shù)資料
型號(hào): M41T66Q6F
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: REAL TIME CLOCK, QCC16
封裝: 3 X 3 MM, ROHS COMPLIANT, QFN-16
文件頁數(shù): 8/33頁
文件大?。?/td> 336K
代理商: M41T66Q6F
Clock operation
M41T66
3.2
Calibrating the clock
The M41T66 is driven by a quartz controlled oscillator with a nominal frequency of
32,768 Hz. The accuracy of the real-time clock depends on the frequency of the quartz
crystal that is used as the time-base for the RTC. The accuracy of the clock is dependent
upon the accuracy of the crystal, and the match between the capacitive load of the oscillator
circuit and the capacitive load for which the crystal was trimmed. The M41T66 oscillator is
designed for use with a 6 pF crystal load capacitance. When the calibration circuit is
properly employed, accuracy improves to better than ±2 ppm at 25°C. The M41T66’s
oscillator can drive the crystal’s load capacitance that is greater than 6 pF. External
capacitors must be added to achieve better clock accuracy (see Figure 4 on page 7).
The oscillation rate of crystals changes with temperature (see Figure 11 on page 17).
Therefore, the M41T66 design employs periodic counter correction. The calibration circuit
adds or subtracts counts from the oscillator divider circuit at the divide by 256 stage, as
shown in Figure 12 on page 17. The number of times pulses which are blanked (subtracted,
negative calibration) or split (added, positive calibration) depends upon the value loaded into
the five calibration bits found in the calibration register. Adding counts speeds the clock up,
subtracting counts slows the clock down.
The calibration bits occupy the five lower order bits (D4-D0) in the calibration register (08h).
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is a
sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register.
Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in
the Calibration byte would represent +10.7 or –5.35 seconds per day which corresponds to
a total range of +5.5 or –2.75 minutes per month (see Figure 12 on page 17).
Two methods are available for ascertaining how much calibration the M41T66 may require:
The first involves setting the clock, letting it run for a month and comparing it to a known
accurate reference and recording deviation over a fixed period of time. Calibration
values, including the number of seconds lost or gained in a given period, can be found
in application note AN934, “TIMEKEEPER calibration.” This allows the designer to
give the end user the ability to calibrate the clock as the environment requires, even if
the final product is packaged in a non-user serviceable enclosure. The designer could
provide a simple utility that accesses the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the
use of the SQW pin. The SQW pin will toggle at 512 Hz when RS3 = '0,' RS2 = '1,'
RS1 = '1,' RS0 = '0,' SQWE = ‘1’ and ST = '0'.
Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at
the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm
oscillator frequency error, requiring a –10 (XX001010) to be loaded into the calibration byte
for correction. Note that setting or changing the calibration byte does not affect the square
wave output frequency.
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