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參數(shù)資料
| 型號： | M391T2953CZ3-CCC |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.6 ns, DMA240 |
| 封裝： | ROHS COMPLIANT, DIMM-240 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 780K |
| 代理商： | M391T2953CZ3-CCC |
Rev. 1.5 October 2006
UDIMM
DDR2 SDRAM
2 of 24
Table of Contents
1.0 DDR2 Unbuffered DIMM Ordering Information ..........................................................................4
2.0 Features .........................................................................................................................................4
3.0 Address Configuration .................................................................................................................4
4.0 x64 DIMM Pin Configurations (Front side/Back side) ................................................................5
5.0 x72 DIMM Pin Configurations (Front side/Back side) ................................................................6
6.0 Pin Description ..............................................................................................................................6
7.0 Input/Output Functional Description ..........................................................................................7
8.0 Functional Block Diagram : .........................................................................................................8
8.1 512MB, 64Mx64 Module - M378T6553CZ3 / M378T6553CZ0
.................................................................8
8.2 512MB, 64Mx72 ECC Module - M391T6553CZ3 / M391T6553CZ0
..........................................................9
8.3 1GB, 128Mx64 Module - M378T2953CZ3 / M378T2953CZ0
.................................................................10
8.4 1GB, 128Mx72 ECC Module - M391T2953CZ3 / M391T2953CZ0
..........................................................11
8.5 256MB, 32Mx64 Module - M378T3354CZ3 / M378T3354CZ0
...............................................................12
9.0 Absolute Maximum DC Ratings .................................................................................................13
10.0 AC & DC Operating Conditions ...............................................................................................13
10.1 Recommended DC Operating Conditions (SSTL - 1.8)
...................................................................13
10.2 Operating Temperature Condition
..............................................................................................14
10.3 Input DC Logic Level
................................................................................................................14
10.4 Input AC Logic Level
...............................................................................................................14
10.5 AC Input Test Conditions
..........................................................................................................14
11.0 IDD Specification Parameters Definition .................................................................................15
12.0 Operating Current Table ...........................................................................................................16
12.1 M378T6553CZ3 / M378T6553CZ0 : 512MB(64Mx8 *8) Module
.........................................................16
12.2 M378T2953CZ3 / M378T2953CZ0 : 1GB(64Mx8 *16) Module
..........................................................16
12.3 M378T3354CZ3 / M378T3354CZ0 : 256MB(32Mx16 *4) Module
.......................................................17
12.4 M391T6553CZ3 / M391T6553CZ0 : 512MB(64Mx8 *9) ECC Module
..................................................17
12.5 M391T2953CZ3 / M391T2953CZ0 : 1GB(64Mx8 *18) ECC Module
....................................................18
13.0 Input/Output Capacitance ........................................................................................................19
14.0 Electrical Characteristics & AC Timing for DDR2-800/667/533/400 ......................................19
14.1 Refresh Parameters by Device Density
.......................................................................................19
14.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
............................................19
14.3 Timing Parameters by Speed Grade
...........................................................................................20
15.0 Physical Dimensions : ..............................................................................................................22
15.1 64Mbx8 based 64Mx64/x72 Module (1 Rank)
................................................................................ 22
15.2 64Mbx8 based 128Mx64/x72 Module (2 Ranks)
............................................................................23
15.3 32Mbx16 based 32Mx64 Module (1 Rank)
....................................................................................24
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M391T2953CZ3-CD5 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
| M391T2953CZ3-CE6 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
| M391T2953CZ3-CE600 | 制造商:Samsung Semiconductor 功能描述:512 DDR SDRAM MODUL X72 BOC(LF) - Trays |
| M391T2953CZ3-CE7 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
| M391T3253FG0-CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE |
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