參數(shù)資料
型號(hào)： M38517F8SP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁(yè)數(shù)： 9/91頁(yè)
文件大?。?/td> 1161K
代理商： M38517F8SP
Rev.1.01
Oct 15, 2003
page 17 of 89
3851 Group (Built-in 24 KB or more ROM)
INTERRUPTS
Interrupts occur by 17 : seven external, nine internal, and one soft-
ware.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the
corresponding interrupt request and enable bits are “1” and the in-
terrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The BRK instruction cannot be disabled with any flag or bit. The I
(interrupt disable) flag disables all interrupts except the BRK in-
struction interrupt.
When several interrupts occur at the same time, the interrupts are
received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are auto-
matically performed:
1. The contents of the program counter and the processor status
register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
3. The interrupt jump destination address is read from the vector
table into the program counter.
Notes
When setting the followings, the interrupt request bit may be set to
“1”.
When setting external interrupt active edge
Related register: Interrupt edge selection register (address 003A16)
Timer XY mode register (address 002316)
When switching interrupt sources of an interrupt vector address
where two or more interrupt sources are allocated
Related register: Interrupt edge selection register (address 003A16)
When not requiring for the interrupt occurrence synchronized with
these setting, take the following sequence.
(1) Set the corresponding interrupt enable bit to “0” (disabled).
(2) Set the interrupt edge select bit or the interrupt source select
bit.
(3) Set the corresponding interrupt request bit to “0” after 1 or
more instructions have been executed.
(4) Set the corresponding interrupt enable bit to “1” (enabled).
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M38517T-PAC 功能描述:DEV SIMPLE TOOL EMULATOR FOR M38 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:*
M3852 BK001 制造商:Alpha Wire 功能描述:CBL 8COND 14AWG BLK 1000'
M3852 BK002 制造商:Alpha Wire 功能描述:CBL 8COND 14AWG BLK 500'
M3852 BK005 制造商:Alpha Wire 功能描述:CBL 8COND 14AWG BLK 100'
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