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    參數(shù)資料
    型號: M38514E6SP
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP42
    封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
    文件頁數(shù): 7/93頁
    文件大?。?/td> 1137K
    代理商: M38514E6SP
    Rev.1.01
    Oct 15, 2003
    page 13 of 89
    3851 Group (Built-in 24 KB or more ROM)
    I/O PORTS
    The I/O ports have direction registers which determine the input/
    output direction of each individual pin. Each bit in a direction
    register corresponds to one pin, and each pin can be set to be
    input port or output port.
    When “0” is written to the bit corresponding to a pin, that pin
    becomes an input pin. When “1” is written to that bit, that pin
    becomes an output pin.
    If data is read from a pin which is set to output, the value of the
    port output latch is read, not the value of the pin itself. Pins set to
    input are floating. If a pin set to input is written to, only the port
    output latch is written to and the pin remains floating.
    Pin
    Name
    Input/Output
    I/O Structure
    Non-Port Function
    Table 7 I/O port function
    Related SFRs
    Port P0
    Port P1
    P00/SIN2
    P01/SOUT2
    P02/SCLK2
    P03/SRDY2
    P04–P07
    P10–P17
    P20/XCOUT
    P21/XCIN
    P22/SDA1
    P23/SCL1
    P24/SDA2/RxD
    P25/SCL2/TxD
    P26/SCLK1
    P27/CNTR0/SRDY1
    P30/AN0–P34/AN4
    P40/CNTR1
    P41/INT0
    P42/INT1
    P43/INT2/SCMP2
    P44/INT3/PWM
    CMOS compatible
    input level
    CMOS 3-state output
    Serial I/O2 control register
    Serial I/O2 function I/O
    CPU mode register
    CMOS compatible
    input level
    CMOS/SMBUS input
    level (when selecting I2C-
    BUS interface function)
    CMOS 3-state output
    N-channel open-drain
    output (when selecting I2C-
    BUS interface function)
    Input/output,
    individual
    bits
    Ref.No.
    (5)
    (1)
    (2)
    (3)
    (4)
    (6)
    (7)
    (8)
    (9)
    (10)
    (11)
    (17)
    CMOS compatible
    input level
    CMOS/SMBUS input
    level (when selecting I2C-
    BUS interface function)
    N-channel open-drain
    output
    (12)
    (13)
    (14)
    Sub-clock generating
    circuit
    I2C-BUS interface
    function I/O
    I2C-BUS interface
    function I/O
    Serial I/O1 function I/O
    Timer X function I/O
    A-D conversion input
    Timer Y function I/O
    External interrupt input
    SCMP2 output
    External interrupt input
    PWM output
    Port P2
    Port P3
    Port P4
    CMOS compatible
    input level
    CMOS 3-state
    output
    I2C control register
    Serial I/O1 control register
    Timer XY mode register
    A-D control register
    Timer XY mode register
    Interrupt edge selection
    register
    Interrupt edge selection register
    Serial I/O2 control register
    (15)
    (16)
    (18)
    Note: When reading bit 5, 6, or 7 of ports P3 and P4, the contents are undefined.
    Interrupt edge selection register
    PWM control register
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