參數(shù)資料
型號(hào)： M38504M6A-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
封裝： 8.40 X 17.50 MM, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁(yè)數(shù)： 45/90頁(yè)
文件大?。?/td> 899K
代理商： M38504M6A-XXXFP
Rev.2.10
2005.11.14
page 3 of 86
REJ03B0093-0210
3850 Group (Spec.A)
VCC, VSS
Functions
Name
Pin
Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
This pin controls the operation mode of the chip.
Normally connected to VSS.
Reference voltage input pin for A/D converter.
Analog power source input pin for A/D converter.
Connect to Vss.
Reset input pin for active “L”.
Input and output pins for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set
the oscillation frequency.
When an external clock is used, connect the clock source to the XIN pin and leave the XOUT
pin open.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
CMOS 3-state output structure.
Pull-up control is enabled in a byte unit.
P10 to P17 (8 bits) are enabled to output large current
for LED drive.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
P20, P21, P24 to P27: CMOS3-state output structure.
P22, P23: N-channel open-drain structure.
Pull-up control of P20, P21, P24–P27 is enabled in a
byte unit.
Power source
Table 1 Pin description
Function except a port function
Analog power
source
Reset input
I/O port P0
CNVSS input
CNVSS
VREF
Reference voltage
AVss
RESET
XIN
I/O port P1
Serial I/O2 function pin
Sub-clock generating circuit I/O
pins (connect a resonator)
I/O port P2
I/O port P3
I/O port P4
Serial I/O1 function pin
Serial I/O1 function pin/
Timer X function pin
A/D converter input pin
Timer Y function pin
Interrupt input pins
Interrupt input pin
SCMP2 output pin
Interrupt input pin
PWM output pin
5-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
Pull-up control is enabled in a bit unit.
5-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
Pull-up control is enabled in a bit unit.
A/D converter input pin
Clock output
XOUT
P00/SIN2
P01/SOUT2
P02/SCLK2
P03/SRDY2
P04/AN5–P07/AN8
Clock input
P10–P17
P20/XCOUT
P21/XCIN
P22
P23
P24/RxD
P25/TxD
P26/SCLK1
P27/CNTR0/
SRDY1
P30/AN0–
P34/AN4
P40/CNTR1
P41/INT0
P42/INT1
P43/INT2/SCMP2
P44/INT3/PWM
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