參數(shù)資料
型號: M38039M6-XXXHP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 63/119頁
文件大?。?/td> 1575K
代理商: M38039M6-XXXHP
Rev.1.00
REJ03B0212-0100
Apr 2, 2007
Page 63 of 117
3803 Group (Spec.L)
RESET CIRCUIT
To reset the microcomputer, RESET pin should be held at an “L”
level for 16 cycles or more of X
IN
. Then the RESET pin is
returned to an “H” level (the power source voltage should be
between 1.8 V and 5.5 V (between 2.7 V to 5.5 V for flash
memory version), and the oscillation should be stable), reset is
released. After the reset is completed, the program starts from the
address contained in address FFFD
16
(high-order byte) and
address FFFC
16
(low-order byte). Make sure that the reset input
voltage for the mask ROM version is less than 0.29 V for V
CC
of
1.8 V.
In the flash memory version, input to the RESET pin in the
following procedure.
When power source is stabilized
(1) Input “L” level to RESET pin.
(2) Input “L” level for 16 cycles or more to X
IN
pin.
(3) Input “H” level to RESET pin.
At power-on
(1) Input “L” level to RESET pin.
(2) Increase the power source voltage to 2.7 V.
(3) Wait for td(P-R) until internal power source has stabilized.
(4) Input “L” level for 16 cycles or more to X
IN
pin.
(5) Input “H” level to RESET pin.
Fig 60. Reset circuit example
Fig 61. Reset sequence
V
CC
RESET
V
CC
RESET
Power source
voltage detection
circuit
Example at V
CC
= 5 V
(1)
0 V
0 V
V
CC
RESET
0.2V
CC
or less
0 V
0 V
V
CC
RESET
td(P-R)+X
IN
16 cycles or more
5 V
5 V
2.7 V
Notes 1:
Reset release voltage
mask ROM version: V
CC
= 1.8 V
Flash memory version: V
= 2.7 V
2:
In the flash memory version, this time is required td(P-R)+X
IN
16 cycles
or more.
(2)
RESET
Internal
reset
Data
φ
Address
SYNC
X
IN
FFFC
FFFD
AD
H
,
L
AD
L
AD
H
Notes 1:
The frequency relation of f(X
IN
) and f(
φ
) is f(X
IN
) = 8 f(
φ
).
2:
The question marks () indicate an undefined state that depends on the previous state.
Reset address from the
vector table.
X
IN
: 10.5 to 18.5 clock cycles
相關(guān)PDF資料
PDF描述
M38039M6-XXXKP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38039M6-XXXSP 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
M38039M6-XXXWG SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38039M7L-XXXHP 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
M38039M7L-XXXKP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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