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參數資料
| 型號： | M37753M8C |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| 中文描述： | 單片微機16位的CMOS（16位單片機） |
| 文件頁數： | 49/109頁 |
| 文件大?。?/td> | 865K |
| 代理商： | M37753M8C |
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49
MITSUBISHI MICROCOMPUTERS
M37753M8C-XXXFP, M37753M8C-XXXHP
M37753S4CFP, M37753S4CHP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Output pin of trans-
mit clock select bits
TC
1
0
0
1
1
Note:
It outputs “H” when bit 2 of the port P8 direction register is “1”, and it
becomes floating when bit 2 is “0”.
Table 6. Output pin of transmit clock select bits and pins’ function
TC
0
0
1
0
1
Pin name
P8
1
/CLK
0
CLK
0
CLK
0
“H”
“H”
P8
2
/R
X
D
0
R
X
D
0
“H”
(Note)
CLKS
2
“H”
(Note)
P8
0
/CTS
0
/RTS
0
/DA
0
P8
0
/CTS
0
/RTS
0
/DA
0
P8
0
P8
0
CLKS
1
Fig. 62 Relevant registers except special function select register 1
bit configuration in plural output of transmit clock mode
0 0 1 : Clock synchronous
0 : Internal clock
This bit must be “0”
UART0 Transmit/Receive mode register
7
0
6
5
4
3
0
2
0
1
0
0
1
Address
30
16
1 : Disable CTS, RTS
UART0 Transmit/Receive control register 0
7
6
5
4
1
3
2
1
0
Address
34
16
0 : Disable receive
UART0 Transmit/Receive control register 1
7
6
5
4
3
2
0
1
0
Address
35
16
0 : Disable D-A output
A-D control register 1
7
0
6
5
4
3
2
1
0
Address
1F
16
Fig. 61 External connection example in plural output of transmit
clock mode
UART0
D
IN
CLK
Note: This is available in clock synchronous serial I/O, using internal clock
and transmission mode.
CLKS
1
CLKS
0
CLK
0
T
X
D
0
D
IN
CLK
D
IN
CLK
Receive
Receive starts when bit 2 (REk flag) of UARTk Transmit/Receive
control register 1 is set to “1”.
The RTSk output is “H” when the REk flag is “0” and goes “L” when
the REk flag changed to “1” and the TIk flag did to “0”. It goes back to
“H” when receive starts. The TIk flag is cleared to “0” by write dummy
data to the transmit buffer register. It is ready to receive when RTSk
output is “L”.
The data from the RxDk pin is retrieved and the contents of the re-
ceive register is shifted by 1 bit each time when the transmission
clock CLKj changes from “L” to “H.” When an 8-bit data is received,
the contents of the receive register is transferred to the receive buffer
register and bit 3 (RIk flag) of UARTk Transmit/Receive control regis-
ter 1 is set to “1”. In other words, the setting “1” to the RIk flag indi-
cates that the receive buffer register contains the received data.
When the RIk flag changes from “0” to “1”, the interrupt request bit in
the UARTk receive interrupt control register is set to “1”. Bit 4 (OERk
flag) of UARTk Transmit/Receive control register 1 is set to “1” when
the next data is transferred from the receive register to the receive
buffer register while RIk flag is “1”, and indicates that the next data
was transferred to the receive register before the contents of the re-
ceive buffer register was read. RIk flag is automatically cleared to “0”
when the low-order byte of the receive buffer register is read or when
the REk flag is cleared to “0”. The OERk flag is cleared when the REk
flag is cleared or port P8 is set to a parallel port. Bit 5 (FERk flag), bit
6 (PERk flag), and bit 7 (SUMk flag) are ignored in clock synchro-
nous mode.
When reading the contents of the receive buffer register, the re-
ceived data is pulled from the least significant bit (LSB) in the re-
ceived order if bit 7 (TEM) of the UARTj Transmit/Receive control
registers 0 is “0”. If bit 7 (TEM) is “1”, the received data is pulled from
the most significant bit (MSB).
As shown in Figure 54, with clock synchronous serial communica-
tion, data cannot be received unless the transmitter is operating be-
cause the receive clock is created from the transmission clock.
Therefore, the transmitter must be operating even when there is no
need to sent data from UARTk to UARTj.
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| M37754M6C | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| M378T2953BG0-CC | DDR2 Unbuffered SDRAM MODULE |
| M378T3354BG | DDR2 Unbuffered SDRAM MODULE |
| M378T3354BG0-CC | DDR2 Unbuffered SDRAM MODULE |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| M37753M8C-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37753M8C-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37753S4CFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37753S4CHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37754 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16BIT CMOS MICROCOMPUTER |
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