
CENTRAL PROCESSING UNIT (CPU)
7702/7703 Group User’s Manual
2–11
2.2 Bus interface unit
Fig. 2.2.1 Bus and bus interface unit (BIU)
M377
0
2
Internal
bus
D
8
to
D
15
Central
processing
unit
(CPU)
SFR
:
Special
Function
Register
Notes
1:
The
CPU
bus,
internal
bus,
and
external
bus
are
independent
of
one
another.
2:
Refer
to
“Chapter
12.
CONNECTION
WITH
EXTERNAL
DEVICES”
about
control
signals
of
the
external
bus.
Internal
bus
A
0
to
A
23
External
device
Internal
control
signal
CPU
bus
Internal
bus
Internal
bus
D
0
to
D
7
Internal
memory
Internal
peripheral
device
(SFR)
External
bus
A
0
to
A
7
A
16
/D
0
to
A
23
/D
7
Control
signals
Bus
interface
unit
(BIU)
A
8
/D
8
to
A
15
/D
15
Bus
conversion
circuit