
7702/7703 Group User’s Manual
INTERRUPTS
4–26
4.11 Precautions when using interrupts
1. Use the SEB or CLB instruction when setting the interrupt control registers (addresses 7016 to
7F16.)
2. To change the interrupt priority level select bits (bits 0 to 2 at addresses 7016 to 7F16), 2 to 7 cycles
of
φ are required after executing an write-instruction until completion of the interrupt priority level’s
change. Accordingly, it is necessary to reserve enough time by software when changing the
interrupt priority level of which interrupt source is the same within a very short execution time
consisting of a few instructions.
Figure 4.11.1 shows a program example to reserve time required for changing interrupt priority
level. The time for change depends on the interrupt priority detection timer select bits (bits 4 and
5 at address 5E16). Table 4.11.1 lists the relation between the number of instructions to be inserted
with program example of Figure 4.11.1 and the interrupt priority detection time select bits.
Fig. 4.11.1 Program example to reserve time required for changing interrupt priority level
Table 4.11.1 Relation between number of instructions to be inserted with program example of Figure
4.11.1 and interrupt priority detection time select bits
; Write to interrupt priority level select bits
; Insert NOP instruction (Note)
;
; Write to interrupt priority level select bits
Note: All instructions (other than instructions for writing to address 7X16) which have the
same cycles as NOP instruction can also be inserted. Confirm the number of
instructions to be inserted by Table 4.11.1.
:
SEB .B #0XH, 007XH
NOP
CLB.B #0XH, 007XH
:
Interrupt priority detection time select bits (Note)
Interrupt priority level
detection time
7 cycles of
φ
4 cycles of
φ
2 cycles of
φ
Do not select.
Number of inserted
instructions
NOP instruction 4 or more
NOP instruction 2 or more
NOP instruction 1 or more
b5
0
1
b4
0
1
0
1
Note: We recommend [b5 = “1”, b4 = “0”].