參數(shù)資料
型號： M37542M4-XXXSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP32
封裝： 0.400 INCH, PLASTIC, SDIP-32
文件頁數(shù)： 17/68頁
文件大?。?/td> 1191K
代理商： M37542M4-XXXSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7542 Group
MITSUBISHI MICROCOMPUTERS
24
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
b7
b0 Interrupt control register 1
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit interrupt enable bit
Serial I/O2 receive interrupt enable bit
Serial I/O2 transmit interrupt enable bit
INT0 interrupt enable bit
INT1 interrupt enable bit
Key-on wake up/UART1 bus collision detection
interrupt enable bit
CNTR0 interrupt enable bit
0 : Interrupts disabled
1 : Interrupts enabled
(ICON1 : address 003E16, initial value : 0016)
b7
b0 Interrupt control register 2
Capture 0 interrupt enable bit
Capture 1 interrupt enable bit
Compare interrupt enable bit
Timer X interrupt enable bit
Timer A interrupt enable bit
Timer B interrupt enable bit
A-D conversion/Timer 1 interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0 : Interrupts disabled
1 : Interrupts enabled
(ICON2 : address 003F16, initial value : 0016)
Interrupt request register 2
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ2 : address 003D16, initial value : 0016)
b7
b0
Capture 0 interrupt request bit
Capture 1 interrupt request bit
Compare interrupt request bit
Timer X interrupt request bit
Timer A interrupt request bit
Timer B interrupt request bit
A-D conversion/Timer 1 interrupt request bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
Interrupt request register 1
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit interrupt request bit
Serial I/O2 receive interrupt request bit
Serial I/O2 transmit interrupt request bit
INT0 interrupt request bit
INT1 interrupt request bit
Key-on wake up/UART1 bus collision detection
interrupt request bit
CNTR0 interrupt request bit
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ1 : address 003C16, initial value : 0016)
b7
b0
Interrupt source set register
(INTSET: address 000A16, initial value: 0016)
Key-on wakeup interrupt valid bit
b7
b0
Interrupt source discrimination register
(INTDIS: address 000B16, initial value: 0016)
Key-on wakeup interrupt discrimination bit
b7
b0
Interrupt edge selection register
(INTEDGE : address 003A16, initial value: 0016)
b7
b0
Not used (returns “0” when read)
Timer 1 interrupt valid bit
A-D conversion interrupt valid bit
UART1 bus collision detection
interrupt valid bit
1: Interrupt valid
0: Interrupt invalid
1: Interrupt occurs
0: Interrupt does not occur
Not used (returns “0” when read)
Timer 1 interrupt discrimination bit
A-D conversion interrupt discrimination bit
UART1 bus collision detection
interrupt discrimination bit
INT0 interrupt edge selection bit
0 : Falling edge active
1 : Rising edge active
INT1 interrupt edge selection bit
0 : Falling edge active
1 : Rising edge active
INT1 input port selection bit
0 : P36
1 : P33
Not used (returns “0” when read)
P00 key-on wakeup enable bit
0 : Key-on wakeup enabled
1 : Key-on wakeup disabled
P04 key-on wakeup enable bit
0 : Key-on wakeup enabled
1 : Key-on wakeup disabled
P06 key-on wakeup enable bit
0 : Key-on wakeup enabled
1 : Key-on wakeup disabled
Fig. 22 Structure of Interrupt-related registers
Note: P36 does not exist for the 32-pin version.
Accordingly, select P33 for the INT1 function.
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