參數(shù)資料
型號(hào)： M37540RSS
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 29/64頁(yè)
文件大?。?/td> 668K
代理商： M37540RSS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7540 Group
MITSUBISHI MICROCOMPUTERS
29
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 30 Operation of UART serial I/O1 function
TSC=0
TBE=1
RBF=0
TBE=0
TBE=0
RBF=1
RBF=1
ST
D
0
D
1
SP
D
0
D
1
ST
SP
TBE=1
TSC=1
ST
D
0
D
1
SP
D
0
D
1
ST
SP
Transmit or receive clock
Transmit buffer write
signal
Generated at 2nd bit in 2-stop-bit mode
1 start bit
7 or 8 data bit
1 or 0 parity bit
1 or 2 stop bit (s)
1:
Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit, during reception).
2:
As the transmit interrupt (TI), when either the TBE or TSC flag becomes “1,” can be selected to occur depending on the setting of the transmit
interrupt source selection bit (TIC) of the serial I/O1 control register.
3:
The receive interrupt (RI) is set when the RBF flag becomes “1.”
4:
After data is written to the transmit buffer when TSC=1, 0.5 to 1.5 cycles of the data shift cycle is necessary until changing to TSC=0.
Notes
8
8
Serial output T
X
D
Serial input R
X
D
Receive buffer read
signal
[Transmit buffer register/receive buffer register (TB/RB)] 0018
16
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer is write-only and the
receive buffer is read-only. If a character bit length is 7 bits, the MSB
of data stored in the receive buffer is “0”.
[Serial I/O1 status register (SIO1STS)] 0019
16
The read-only serial I/O1 status register consists of seven flags (bits
0 to 6) which indicate the operating status of the serial I/O1 function
and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the receive
buffer register is read.
If there is an error, it is detected at the same time that data is trans-
ferred from the receive shift register to the receive buffer register,
and the receive buffer full flag is set. A write to the serial I/O1 status
register clears all the error flags OE, PE, FE, and SE (bit 3 to bit 6,
respectively). Writing “0” to the serial I/O1 enable bit SIOE (bit 7 of
the serial I/O1 control register) also clears all the status flags, includ-
ing the error flags.
All bits of the serial I/O1 status register are initialized to “0” at reset,
but if the transmit enable bit (bit 4) of the serial I/O1 control register
has been set to “1”, the transmit shift completion flag (bit 2) and the
transmit buffer empty flag (bit 0) become “1”.
[Serial I/O1 control register (SIO1CON)] 001A
16
The serial I/O1 control register consists of eight control bits for the
serial I/O1 function.
[UART control register (UARTCON)] 001B
16
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set the
data format of an data transfer and one bit (bit 4) which is always
valid and sets the output structure of the P1
1
/TXD
1
, P1
2
/S
CLK1
pin.
[Baud rate generator (BRG)] 001C
16
The baud rate generator determines the baud rate for serial trans-
fer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate generator.
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