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參數(shù)資料
| 型號(hào)： | M37531E8FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO36 |
| 封裝： | 0.450 INCH, PLASTIC, SSOP-36 |
| 文件頁(yè)數(shù)： | 161/215頁(yè) |
| 文件大小： | 1365K |
| 代理商： | M37531E8FP |
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BEFORE USING THIS MANUAL
This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,
such as hardware design or software development. Chapter 3 also includes necessary information for
systems development. You must refer to that chapter.
1. Organization
q CHAPTER 1 HARDWARE
This chapter describes features of the microcomputer and operation of each peripheral function.
q CHAPTER 2 APPLICATION
This chapter describes usage and application examples of peripheral functions, based mainly on
setting examples of relevant registers.
q CHAPTER 3 APPENDIX
This chapter includes necessary information for systems development using the microcomputer, such
as the electrical characteristics, the list of registers, the Mask ROM confirmation form (for mask ROM
version), the ROM programming confirmation form (for One Time PROM version), and the Mark
specification form which are to be submitted when ordering.
2. Structure of register
The figure of each register structure describes its functions, contents at reset, and attributes as follows :
Note 2: Bit attributes......... The attributes of control register bits are classified into 3 bytes : read-only, write-
only and read and write. In the figure, these attributes are represented as follows :
: Bit in which nothing is arranged
0 1 :
Name
Function
At reset
RW
B
0
1
2
3
4
0
!
5
6
7
1
b0
b1
b2
b3
b4
b5
b6
b7
Contents immediately after reset release
Bit attributes
(Note 1)
Processor mode bits
Stack page selection bit
Nothing arranged for these bits. These are write disabled
bits. When these bits are read out, the contents are “0.”
Fix this bit to “0.”
Main clock (XIN-XOUT) stop bit
Internal system clock selection bit
0 0 : Single-chip mode
1 0 :
1 1 :
Not available
b1 b0
0 : 0 page
1 : 1 page
0 : Operating
1 : Stopped
0 : XIN-XOUT selected
1 : XCIN-XCOUT selected
: Bit that is not used for control of the corresponding function
0
Note 1:. Contents immediately after reset release
0....... “0” at reset release
1....... “1” at reset release
?....... Undefined at reset release
V.......Contents determined by option at reset release
R....... Read
...... Read enabled
!.......Read disabled
W......Write
..... Write enabled
!...... Write disabled
V.......“0” write
(Note 2)
CPU mode register (CPUM) [Address : 3B 16]
Bits
V
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