參數(shù)資料
型號: M366S3253ETU-C7A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: SDRAM Unbuffered Module
中文描述: 內(nèi)存緩沖模塊
文件頁數(shù): 3/26頁
文件大?。?/td> 486K
代理商: M366S3253ETU-C7A
128MB, 256MB, 512MB Unbuffered DIMM
Rev. 1.4 May 2004
SDRAM
Ordering Information
Operating Frequencies
Part Number
Density
Organization
Component Composition
Component
Package
Height
M366S1654ETS-C7A
M366S3253ETS-C7A
M366S3253ETU-C7A
M374S3253ETS-C7A
M374S3253ETU-C7A
M366S6453ETS-C7A
M366S6453ETU-C7A
M374S6453ETS-C7A
M374S6453ETU-C7A
128MB
256MB
256MB
256MB
256MB
512MB
512MB
512MB
512MB
16M x 64
32M x 64
32M x 64
32M x 72
32M x 72
64M x 64
64M x 64
64M x 72
64M x 72
16Mx16(K4S561632E) * 4EA
32Mx8(K4S560832E) * 8EA
32Mx8(K4S560832E) * 8EA
32Mx8(K4S560832E) * 9EA
32Mx8(K4S560832E) * 9EA
32Mx8(K4S560832E)*16EA
32Mx8(K4S560832E)*16EA
32Mx8(K4S560832E)*18EA
32Mx8(K4S560832E)*18EA
54-TSOP(II)
1,000mil
1,375mil
1,125mil
1,375mil
1,125mil
1,375mil
1,125mil
1,375mil
1,125mil
7A
@CL3
@CL2
Maximum Clock Frequency
CL-tRCD-tRP(clock)
133MHz(7.5ns)
3 - 3 - 3
100MHz(10ns)
2 - 2 - 2
Feature
Burst mode operation
Auto & self refresh capability (8192 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
±
0.3V power supply
MRS cycle with address key programs Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock
Serial presence detect with EEPROM
168Pin Unbuffered DIMM based on 256Mb E-die (x8, x16)
相關(guān)PDF資料
PDF描述
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