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| 型號(hào)： | M34507M4-XXXFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| 封裝： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁(yè)數(shù)： | 32/117頁(yè) |
| 文件大?。?/td> | 937K |
| 代理商： | M34507M4-XXXFP |
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4507 Group
Rev.3.01
2005.02.04
page 19 of 111
REJ03B0107-0301
(6) Interrupt control registers
Interrupt control register V1
Interrupt enable bits of external 0, timer 1 and timer 2 are as-
signed to register V1. Set the contents of this register through
register A with the TV1A instruction. The TAV1 instruction can be
used to transfer the contents of register V1 to register A.
Interrupt control register V2
The A/D interrupt enable bit is assigned to register V2. Set the
contents of this register through register A with the TV2A instruc-
tion. The TAV2 instruction can be used to transfer the contents of
register V2 to register A.
Table 6 Interrupt control registers
V13
V12
V11
V10
V23
V22
V21
V20
Not used
A/D interrupt enable bit
Not used
Interrupt control register V1
Timer 2 interrupt enable bit
Timer 1 interrupt enable bit
Not used
External 0 interrupt enable bit
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: These instructions are equivalent to the NOP instrucion.
Interrupt disabled (SNZT2 instruction is valid)
Interrupt enabled (SNZT2 instruction is invalid) (Note 2)
Interrupt disabled (SNZT1 instruction is valid)
Interrupt enabled (SNZT1 instruction is invalid) (Note 2)
This bit has no function, but read/write is enabled.
Interrupt disabled (SNZ0 instruction is valid)
Interrupt enabled (SNZ0 instruction is invalid) (Note 2)
This bit has no function, but read/write is enabled.
Interrupt disabled (SNZAD instruction is valid)
Interrupt enabled (SNZAD instruction is invalid) (Note 2)
This bit has no function, but read/write is enabled.
0
1
0
1
0
1
0
1
R/W
at RAM back-up : 00002
at reset : 00002
R/W
at RAM back-up : 00002
at reset : 00002
Interrupt control register V2
R/W
at RAM back-up : 00002
at reset : 00002
0
1
0
1
0
1
0
1
(7) Interrupt sequence
Interrupts only occur when the respective INTE flag, interrupt en-
able bits (V10, V12, V13, V22), and interrupt request flag are “1.”
The interrupt actually occurs 2 to 3 machine cycles after the cycle
in which all three conditions are satisfied. The interrupt occurs after
3 machine cycles only when the three interrupt conditions are sat-
isfied on execution of other than one-cycle instructions (Refer to
Figure 16).
相關(guān)PDF資料 |
PDF描述 |
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| M34507M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| M34509G4FP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| M34513M4-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP32 |
| M34514M6-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
| M34514M8-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34508G4FP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34508G4GP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34508G4GP#U0 | 功能描述:MCU 2/5V 4096 QZROM PB-FREE 20-S RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:720/4500 標(biāo)準(zhǔn)包裝:300 系列:78K0R/Ix3 核心處理器:78K/0R 芯體尺寸:16-位 速度:40MHz 連通性:3 線 SIO，I²C，LIN，UART/USART 外圍設(shè)備:DMA，LVD，POR，PWM，WDT 輸入/輸出數(shù):27 程序存儲(chǔ)器容量:16KB（16K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:38-SSOP 包裝:托盤(pán) |
| M34508G4GP(#UO) | 制造商:Renesas Electronics Corporation 功能描述: |
| M34508G4HFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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