12
12-10
Serial I/O
12.2 Serial I/O Related Registers
32176 Group User’s Manual (Rev.1.01)
SIO03 Interrupt Request Mask Register (SI03MASK)
<Address: H’0080 0101>
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
8
T0MASK
0: Mask (disable) interrupt request
R
W
SIO0 transmit interrupt request mask bit
1: Enable interrupt request
9
R0MASK
0: Mask (disable) interrupt request
R
W
SIO0 receive interrupt request mask bit
1: Enable interrupt request
10
T1MASK
0: Mask (disable) interrupt request
R
W
SIO1 transmit interrupt request mask bit
1: Enable interrupt request
11
R1MASK
0: Mask (disable) interrupt request
R
W
SIO1 receive interrupt request mask bit
1: Enable interrupt request
12
T2MASK
0: Mask (disable) interrupt request
R
W
SIO2 transmit interrupt request mask bit
1: Enable interrupt request
13
R2MASK
0: Mask (disable) interrupt request
R
W
SIO2 receive interrupt request mask bit
1: Enable interrupt request
14
T3MASK
0: Mask (disable) interrupt request
R
W
SIO3 transmit interrupt request mask bit
1: Enable interrupt request
15
R3MASK
0: Mask (disable) interrupt request
R
W
SIO3 receive interrupt request mask bit
1: Enable interrupt request
The register enables or masks (disables) the interrupt requests generated by each SIO. Interrupt requests from
any SIO are enabled by setting its corresponding interrupt request mask bit to "1".
b8
9
1011121314
b15
T0MASK R0MASK T1MASK R1MASK T2MASK R2MASK T3MASK R3MASK
000
0000
0
