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32170/32174 Group User's Manual (Rev. 2.1)
SERIAL I/O
12.8 Fixed Period Clock Output Function
When using SIO0, SIO1, SIO4 or SIO5 in UART mode, you can choose the relevant port (P84, P87,
P65 or P66) to function as the SCLKO0, SCLKO1, SCLKO4 or SCLKO5 pin. In this way, a clock
derived from BRG output by dividing it by 2 can be output from the SCLKO pin.
Note: This clock is output all the time, not just during data transfer.
Figure 12.8.1 Example of Fixed Period Clock Output
SCLKO
TXD
RXD
Clock output to
peripheral circuits
UART transmit/receive
ST
SP
Data
ST
SP
Data
50%
BRG period
Internal BRG
output
SCLKO output
1. Configuration when using BRG/2 clock
2. Operation timing