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32170/32174 Group User's Manual (Rev. 2.1)
DMAC
9.2 DMAC Related Registers
9.2.7 DMA Interrupt Mask Registers
s DMA0-4 Interrupt Mask Register (DM04ITMK)
<Address: H'0080 0401>
D8
9
10111213
14
D15
DMITMK4 DMITMK3 DMITMK2 DMITMK1 DMITMK0
<When reset : H'00>
D
Bit Name
Function
R
W
8 - 10
No functions assigned
0
—
11
DMITMK4 (DMA4 interrupt request mask)
0 : Enables interrupt request
12
DMITMK3 (DMA3 interrupt request mask)
1 : Masks (disables) interrupt request
13
DMITMK2 (DMA2 interrupt request mask)
14
DMITMK1 (DMA1 interrupt request mask)
15
DMITMK0 (DMA0 interrupt request mask)
The DMA0-4 Interrupt Mask Register is used to mask interrupt requests in DMA channels 0-4.
DMITMKn (DMAn interrupt request mask) bit (n = 0 to 4)
DMAn interrupt request is masked by setting the DMAn interrupt request mask bit to 1. However,
when an interrupt request is generated, the DMAn interrupt request status bit is always set to 1
irrespective of the contents of this register.