參數(shù)資料
型號: M308B8SGP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 32 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 6/70頁
文件大小: 1150K
代理商: M308B8SGP
14
XMEGA D4 [DATASHEET]
8135P–AVR–01/2014
Figure 7-2. Data memory map (hexadecimal address).
7.6
EEPROM
XMEGA D devices have EEPROM for nonvolatile data storage. It is either addressable in a separate data space (default)
or memory mapped and accessed in normal data space. The EEPROM supports both byte and page access. Memory
mapped EEPROM allows highly efficient EEPROM reading and EEPROM buffer loading. When doing this, EEPROM is
accessible using load and store instructions. Memory mapped EEPROM will always start at hexadecimal address
0x1000.
7.7
I/O Memory
The status and configuration registers for peripherals and modules, including the CPU, are addressable through I/O
memory locations. All I/O locations can be accessed by the load (LD/LDS/LDD) and store (ST/STS/STD) instructions,
which are used to transfer data between the 32 registers in the register file and the I/O memory. The IN and OUT
instructions can address I/O memory locations in the range of 0x00 to 0x3F directly. In the address range 0x00 - 0x1F,
single-cycle instructions for manipulation and checking of individual bits are available.
The I/O memory address for all peripherals and modules in XMEGA D4 is shown in the “Peripheral Module Address Map”
7.7.1
General Purpose I/O Registers
The lowest 16 I/O memory addresses are reserved as general purpose I/O registers. These registers can be used for
storing global variables and flags, as they are directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
Byte address
ATxmega64D4
Byte address
ATxmega32D4
Byte address
ATxmega16D4
0
I/O Registers (4K)
0
I/O Registers (4K)
0
I/O Registers (4K)
FFF
1000
EEPROM (2K)
1000
EEPROM (1K)
1000
EEPROM (1K)
17FF
13FF
RESERVED
2000
Internal SRAM (4K)
2000
Internal SRAM (4K)
2000
Internal SRAM (2K)
2FFF
27FF
Byte address
ATxmega128D4
0
I/O Registers (4K)
FFF
1000
EEPROM (2K)
17FF
RESERVED
2000
Internal SRAM (8K)
3FFF
相關(guān)PDF資料
PDF描述
M308B8FCGP 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP144
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