參數(shù)資料
型號(hào)： M306V8FJFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP116
封裝： 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁(yè)數(shù)： 30/77頁(yè)
文件大?。?/td> 2650K
代理商： M306V8FJFP
M306V8FJFP
Rev.1.31
Apr 18, 2005
page 34 of 363
REJ03B0082-0131
______
Figure 4.5. Example of Address Bus and CSi Signal Output in 1 Mbyte Mode
Example 1
BCLK
Read signal
Data bus
Address bus
CSi
Access to the external
area indicated by CSi
Access to the external
area indicated by CSj
Address
Data
CSj
Data
BCLK
Read signal
Data bus
Address bus
CSi
Access to the external
area indicated by CSi
Access to the internal
ROM or internal RAM
Address
Data
BCLK
Read signal
Data bus
Address bus
CSi
Access to the external
area indicated by CSi
Access to the same
external area
Address
Data
BCLK
Read signal
Data bus
Address bus
CSi
Access to the external
area indicated by CSi
No access
Address
Data
Address
Shown above is the case where separate bus is selected and the area is accessed for read without wait states. i = 0 to 3, j = 0 to 3
(not including i, however)
To access the external area indicated by CSj in the next cycle after
accessing the external area indicated by CSi
The address bus and the chip select signal both change state between
these two cycles.
Example 2
To access the internal ROM or internal RAM in the next cycle after
accessing the external area indicated by CSi
The chip select signal changes state but the address bus does not
change state
Example 4
Not to access any area (nor instruction prefetch generated) in the next cycle after
accessing the external area indicated by CSi
Neither the address bus nor the chip select signal changes state between
these two cycles
Example 3
To access the external area indicated by CSi in the next cycle after
accessing the external area indicated by the same CSi
The address bus changes state but the chip select signal does not
change state
Note : These examples show the address bus and chip select signal when accessing areas in two successive cycles. The chip select bus cycle
may be extended more than two cycles depending on a combination of these examples.
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