參數(shù)資料
型號: M30622MEP-XXXFP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 59/87頁
文件大?。?/td> 901K
代理商: M30622MEP-XXXFP
V
CC1
= V
CC2
= 3V
M16C/62 Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
4
8
f
3
0
0
2
,
0
.
o
N
0
1
e
R
page 59
Table 5.47 Memory expansion and Microprocessor Modes
(for 1- to 3-wait setting and external area access)
y
m
b
o
l
P
r
a
(
B
C
L
K
-
A
D
)
A
d
r
e
s
s
o
u
t
p
u
t
d
e
l
a
y
t
i
m
t
h
(
B
C
L
K
-
A
D
)
A
d
r
e
s
s
o
u
t
p
u
t
h
o
l
d
t
i
m
e
t
h
(
R
D
-
A
D
)
A
d
r
e
s
s
o
u
t
p
u
t
h
o
l
d
t
i
m
e
t
h
(
W
R
-
A
D
)
A
d
r
e
s
s
o
u
t
p
u
t
h
o
l
d
t
i
m
e
Switching Characteristics
(V
CC1
= V
CC2
= 3V, V
SS
= 0V, at Topr =
20 to 85
o
C /
40 to 85
o
C unless otherwise specified)
S
S
i
n
t
a
.
n
d
a
M
r
d
a
3
Measuring condition
x
.
M
a
m
e
t
e
r
U
n
i
t
t
d
d
d
d
d
e
0
n
n
n
n
s
s
s
s
(
(
(
r
r
r
e
e
e
f
f
f
e
e
e
r
r
r
s
s
s
t
t
t
o
o
o
B
R
W
C
D
R
L
)
)
K
)
4
0
t
h
t
d
t
h
t
d
t
h
t
d
t
h
t
d
t
h
t
d
(
B
C
L
K
-
C
S
)
C
A
A
R
R
W
W
D
D
D
h
L
L
D
D
a
a
i
E
E
R
R
t
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t
(
(
r
(
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t
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m
t
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r
e
m
i
m
e
(
r
e
f
e
r
s
t
o
B
C
L
K
)
4
n
n
n
n
n
n
n
n
n
n
s
s
s
s
s
s
s
s
s
s
(
B
C
L
K
-
A
L
E
)
t
t
l
y
e
2
5
(
B
C
L
K
-
A
L
E
)
e
e
4
(
B
C
L
K
-
R
D
)
i
i
n
n
u
u
3
0
(
B
C
L
K
-
R
D
)
e
m
e
f
f
e
0
(
B
C
L
K
-
W
R
)
l
l
e
3
0
(
B
C
L
K
-
W
R
)
0
(
B
C
L
K
-
D
B
)
t
l
l
l
e
r
f
e
r
s
s
o
t
t
o
o
B
C
W
C
L
R
L
K
)
K
)
(
)
3
4
0
(
B
C
L
K
-
D
B
)
s
r
t
B
)
4
t
h
t
d
(
W
R
-
D
B
)
D
H
a
L
t
D
a
A
o
u
o
t
u
p
t
u
p
t
u
h
t
o
d
l
e
d
a
t
i
y
m
e
t
i
(
r
e
e
f
e
r
s
t
o
W
R
)
(
3
)
n
n
s
s
(
D
B
-
W
R
)
1
.
C
a
l
c
u
l
a
t
n
e
d
a
c
c
o
r
d
i
n
g
t
o
t
h
e
B
C
L
K
f
r
a
W
e
q
u
e
n
c
y
a
s
f
o
l
l
o
w
s
:
f(
B
C
L
K
)
(
0
.
5
)
X
1
0
9
40
[ns]
t
d
(
B
C
L
K
-
C
S
)
C
h
i
p
s
e
l
e
c
t
o
u
t
p
u
t
d
e
l
a
y
t
i
m
e
3
0
n
s
(Note 2)
3. This standard value shows the timing when the output is off,
and does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t =
CR X ln (1
V
OL
/ V
CC2
)
by a circuit of the right figure.
For example, when V
OL
= 0.2V
CC2
, C = 30pF, R = 1k
, hold time
of output
L
level is
t =
30pF X 1k
X ln (1
0.2V
CC2
/ V
CC2
)
= 6.7ns.
D
B
i
R
C
(Note 1)
(Note 2)
2
.
C
a
l
c
u
l
a
t
e
d
a
c
c
o
r
d
i
n
g
t
o
t
h
e
B
C
L
K
f
r
e
q
u
e
n
c
y
a
s
f
o
l
l
o
w
s
:
f(
B
C
L
K
)
0
.
5
X
1
0
9
[n
s
]
n
i
s
d
h
e
n
1
3
n
f
f
=
o
o
r
r
1
,
1
3
-
-
f
(
w
w
B
a
a
C
i
i
t
t
L
s
s
K
e
e
)
t
t
t
t
i
s
i
n
i
n
g
g
1
,
.
2
2
f
o
r
2
-
w
a
i
t
s
e
t
t
i
n
g
n
.
5
M
H
z
o
r
l
e
s
s
.
1
0
NOTES:
l
m
4
0
(
B
C
L
K
-
H
L
D
A
)
See
Figure 5.11
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