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參數(shù)資料
| 型號(hào)： | M30222 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 144/237頁(yè) |
| 文件大?。?/td> | 2297K |
| 代理商： | M30222 |
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1-145
Unde
Specifications in this manual are tentative and subject to change
Rev. G
Serial I/O (3, 4)
MITSUBISHI MICROCOMPUTERS
M30222 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.44. Specifications of S I/O 3, 4
Note 1: n is a value from 00
16
through FF
16
set in the S I/Oi transfer rate register (i = 3, 4).
Note 2: With the external clock selected:
Before data can be written to the SI/Oi transmit/receive register (addresses 0360
16
, 0364
16
), the
CLKi pin input must be in the low state. Also, before rewriting the SI/Oi Control Register (addresses
0362
16
, 0366
16
)
’
s bit 7 (S
OUTi
initial value set bit), make sure the CLKi pin input is held low.
The S I/Oi circuit keeps on with the shift operation as long as the synchronous clock is entered in it.
Therefore, stop the synchronous clock immediately when count reaches eight. If selected, the internal
clock stops automatically clocking the SIO channel.
Note 3: If the internal clock is used for the synchronous clock, the transfer clock signal output, when enabled,
stops at the "H" state after transmission is completed.
Item
Transfer data format
Transfer clock
Conditions for
transmit/receive
start
Interrupt request
generation timing
Select function
Precaution
Specifications
Transfer data length: 8 bits
With the internal clock selected (bit 6 of 0362
16
, 0366
16
=
“
1
”
): f1/2(ni+1),
f8/2(ni+1), f32/2(ni+1) (Note 1)
With the external clock selected (bit 6 of 0362
16
, 0366
16
= 0):
Input from the CLKi terminal (Note 2)
To start transmission/reception, the following requirements must be met:
- Select the synchronous clock (use bit 6 of 0362
16
, 0366
16
).
Select a frequency dividing ratio if the internal clock has been selected (use bits
0 and 1 of 0362
16
, 0366
16
).
- S
OUT
i initial value set bit (use bit 7 of 0362
16
, 0366
16
)= 1.
- S I/Oi port select bit (bit 3 of 0362
16
, 0366
16
) = 1.
- Select the transfer direction (use bit 5 of 0362
16
, 0366
16
)
-Write transfer data to SI/Oi transmit/receive register (0360
16
, 0364
16
)
To use S I/Oi interrupts, the following requirements must be met:
- Clear the SI/Oi interrupt request bit before writing transfer data to the SI/Oi
transmit/receive register (bit 3 of 0049
16
, 0048
16
) = 0.
Rising edge of the last transfer clock. (Note 3)
LSB first or MSB first selection
Whether transmission/reception begins with bit 0 (LSB) or bit 7 (MSB) can be
selected.
Function for setting an S
OUTi
initial value selection
When using an external clock for the transfer clock, the user can choose the
S
OUTi
pin output level during a non-transfer time. For details on how to set, see
Figure 1.112.
Unlike UART0
–
2, SI/Oi (i = 3, 4) is not divided for transfer register and buffer.
Therefore, do not write the next transfer data to the SI/Oi transmit/receive register
(addresses 0360
16
, 0364
16
) during a transfer. When the internal clock is selected
for the transfer clock, S
OUTi
holds the last data for a 1/2 transfer clock period after
it finished transferring and then goes to a high-impedance state. However, if the
transfer data is written to the SI/Oi transmit/receive register (addresses 0360
16
,
0364
16
) during this time, S
OUTi
is placed in the high-impedance state immediately
upon writing and the data hold time is thereby reduced.
If an internal clock is selected, set the bit rate generator divisor (0363
16
, 0367
16
)
[It is not necessry to start transmit/receive. It is only needed for operation as
intended]
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| M30222FG | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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