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378
Power Control
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.14.3 Wait Mode Set-Up
Figure 2.14.6. Example of wait mode set-up
Settings and operation for entering wait mode are described here.
(1) Enables the interrupt used for returning from wait mode.
(2) Sets the interrupt enable flag (I flag) to “1”.
(3) Clears the protection and changes the content of the system clock control register.
(4) Executes the WAIT instruction.
Operation
Wait mode
(3) Canceling protect
b7
b0
Protect register [Address 000A 16]
PRCR
1
Enables writing to system clock control registers 0 and 1
(addresses 0006 16 and 000716)
1 : Write-enabled
(4) WAIT instruction
(3) Control of CPU clock
Note: When switching the system clock, it is necessary
to wait for the oscillation to stabilize.
b7
b0
WAIT peripheral function clock stop bit
0 : Do not stop f 1, f8, f32 in wait mode
1 : Stop f1, f8, f32 in wait mode
Port XC select bit
0 : I/O port
1 : XCIN-XCOUT generation
Main clock (XIN-XOUT) stop bit
0 : On
1 : Off
Main clock division select bit 0
0 : CM16 and CM17 valid
1 : Division by 8 mode
System clock select bit (Note)
0 : XIN, XOUT
1 : XCIN, XCOUT
System clock control register 0
[Address 000616] CM0
b7
b0
System clock control register 1
[Address 0007 16] CM1
0
000
Reserved bit
Must be set to “0”
Main clock division select bit
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
b7 b6
Interrupt control register
ADIC
[Address 004E16]
ASIOC
[Address 004F16]
FLDIC
[Address 0050 16]
SiTIC(i=0, 1)
[Address 0051 16, 005316]
SiRIC(i=0, 1)
[Address 0052 16, 005416]
TAiIC(i=0 to 4)
[Address 0055 16 to 005916]
TBiIC(i=0 to 2)
[Address 005A16 to 005C16]
(1) Setting interrupt to cancel wait mode
Make sure that the interrupt priority
level of the interrupt which is used
to cancel the wait mode is higher
than the processor interrupt priority
(IPL) of the routine where the
WAIT instruction is executed.
Interrupt priority level select bit
b7
b0
INTiIC(i=0 to 2)
[Address 005D16 to 005F16]
INTiIC(i=3 to 5)
[Address 004716 to 004916]
Make sure that the interrupt priority level of the
interrupt which is used to cancel the wait mode is
higher than the processor interrupt priority (IPL) of
the routine where the WAIT instruction is executed.
Interrupt priority level select bit
b7
b0
0
Reserved bit
Must be set to “0”
(2) Interrupt enable flag (I flag)
“1”