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377
Power Control
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.14.2 Stop Mode Set-Up
(1) Enables the interrupt used for returning from stop mode.
(2) Sets the interrupt enable flag (I flag) to “1”.
(3) Clearing the protection and setting every-clock stop bit to “1” stops oscillation and causes the
processor to go into stop mode.
Operation
Settings and operation for entering stop mode are described here.
Figure 2.14.5. Example of stop mode set-up
All clocks off (stop mode)
b7
b0
(3) Canceling protect
Protect register [Address 000A 16]
PRCR
1
Enables writing to system clock control registers 0 and 1
(addresses 0006 16 and 000716)
1 : Write-enabled
(3) All clocks off (stop mode)
b7
b0
System clock control register 1 [Address 0007 16]
CM1
0000
Reserved bit
Must be set to “0”
All clock stop control bit
1 : All clocks off (stop mode)
1
Interrupt control register
SiTIC(i=0, 1)
[Address 005116, 005316]
SiRIC(i=0, 1)
[Address 005216, 005416]
TAiIC(i=0 to 4)
[Address 005516 to 005916]
TBiIC(i=0 to 2)
[Address 005A16 to 005C16]
(1) Setting interrupt to cancel stop mode
Make sure that the interrupt priority
level of the interrupt which is used to
cancel the stop mode is higher than
the processor interrupt priority(IPL).
Interrupt priority level select bit
b7
b0
INTiIC(i=0 to 2)
[Address 005D16 to 005F16]
INTiIC(i=3 to 5)
[Address 004716 to 004916]
Make sure that the interrupt priority level of the
interrupt which is used to cancel the stop mode is
higher than the processor interrupt priority(IPL).
Interrupt priority level select bit
b7
b0
0
Reserved bit
Must be set to “0”
System clock control register 0
[Address 000616] CM0
(3) Setting operation clock after returning from stop mode
On
Main clock (XIN-XOUT) stop bit
b7
b0
System clock select bit
XIN, XOUT
As this register becomes setting mentioned above when
operating with XIN (count source of BCLK is X IN),
the user does not need to set it again.
00
System clock control register 0
[Address 000616] CM0
XCIN-XCOUT generation
Port XC select bit
b7
b0
System clock select bit
XCIN, XCOUT
As this register becomes setting mentioned above when operating with X CIN
(count source of BCLK is X CIN), the user does not need to set it again.
When operating with X IN, set port Xc select bit to “1” before setting system clock
select bit to “1”. The both bits cannot be set at the same time.
1
(When operating with X CIN after returning)
(When operating with X IN after returning)
(2) Interrupt enable flag (I flag)
“1”