參數(shù)資料
型號(hào): M30201M2-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP56
封裝: PLASTIC, QFP-56
文件頁(yè)數(shù): 99/158頁(yè)
文件大?。?/td> 1633K
代理商: M30201M2-XXXFP
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45
Under
development
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
Precautions for Interrupts
(1) Reading address 0000016
When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number and
interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 0000016 will then be set to “0”.
Reading address 0000016 by software sets enabled highest priority interrupt source request bit to “0”.
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 0000016 by software.
(2) Setting the stack pointer
The value of the stack pointer immediately after reset is initialized to 000016. Accepting an interrupt
before setting a value in the stack pointer may become a factor of runaway. Be sure to set a value in the
stack pointer before accepting an interrupt. Concerning the first instruction immediately after reset,
generating any interrupts is prohibited.
(3) External interrupt
________
Either an “L” level or an “H” level of at least 250 ns width is necessary for the signal input to pins INT0
________
and INT1 regardless of the CPU operation clock.
________
When changing a polarity of pins INT0 and INT1, the interrupt request bit may become "1". Clear the
______
interrupt request bit after changing the polarity. Figure 1.33 shows the switching condition of INT inter-
rupt request.
______
Figure 1.33. Switching condition of INT interrupt request
(4) Changing interrupt control register
See "Changing Interrupt Control Register".
Set the interrupt priority level to level 0
(Disable INTi interrupt)
Set the polarity select bit
Clear the interrupt request bit to “0”
Set the interrupt priority level to level 1 to 7
(Enable the accepting of INTi interrupt request)
Clear the interrupt enable flag to “0”
(Disable interrupt)
Set the interrupt enable flag to “1”
(Enable interrupt)
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