參數(shù)資料
型號: M2V64S40TP
廠商: Mitsubishi Electric Corporation
英文描述: 64M bit Synchronous DRAM
中文描述: 6400位同步DRAM
文件頁數(shù): 26/52頁
文件大?。?/td> 674K
代理商: M2V64S40TP
Apr. '99
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.2)
M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT)
M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT)
M2V64S40BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 1048576-WORD x 16-BIT)
64M bit Synchronous DRAM
26
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H,
CKE= L). Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During
the self-refresh mode, CKE is asynchronous and the only enabled input ,all other inputs
including CLK are disabled and ignored, so that power consumption due to synchronous
inputs is saved. To exit the self-refresh, supplying stable CLK inputs, asserting DESEL or NOP
command and then asserting CKE (REFSX) for longer than tSRX. After tRC from REFSX all
banks are in the idle state and a new command can be issued, but DESEL or NOP
commands must be asserted till then.
Self-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-11
BA0,1
Self Refresh Entry
Self Refresh Exit
X
00
Stable CLK
NOP
new command
tSRX
minimum tRC
+1 CLOCK
for recovery
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